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/external/llvm/test/CodeGen/Mips/msa/
Dframeindex.ll1 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck -check-prefixes=MIPS32-AE,MIPS32-BE %s
2 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck -check-prefixes=MIPS32-AE,MIPS32-LE %s
5 ; MIPS32-AE: loadstore_v16i8_near:
9 ; MIPS32-AE: ld.b [[R1:\$w[0-9]+]], 0($sp)
11 ; MIPS32-AE: st.b [[R1]], 0($sp)
14 ; MIPS32-AE: .size loadstore_v16i8_near
18 ; MIPS32-AE: loadstore_v16i8_just_under_simm10:
24 ; MIPS32-AE: ld.b [[R1:\$w[0-9]+]], 496($sp)
26 ; MIPS32-AE: st.b [[R1]], 496($sp)
29 ; MIPS32-AE: .size loadstore_v16i8_just_under_simm10
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D3r_splat.ll5 ; RUN: FileCheck -check-prefix=MIPS32 %s
7 ; RUN: FileCheck -check-prefix=MIPS32 %s
22 ; MIPS32: llvm_mips_splat_b_test:
23 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_splat_b_ARG1)(
24 ; MIPS32-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_splat_b_RES)(
25 ; MIPS32-DAG: ld.b [[R3:\$w[0-9]+]], 0([[R1]])
26 ; MIPS32-DAG: splat.b [[R4:\$w[0-9]+]], [[R3]][$4]
27 ; MIPS32-DAG: st.b [[R4]], 0([[R2]])
28 ; MIPS32: .size llvm_mips_splat_b_test
43 ; MIPS32: llvm_mips_splat_h_test:
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Delm_copy.ll5 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS32
7 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS32
27 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_copy_s_b_ARG1)
31 ; MIPS32-DAG: lw [[RES:\$[0-9]+]], %got(llvm_mips_copy_s_b_RES)
50 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_copy_s_h_ARG1)
54 ; MIPS32-DAG: lw [[RES:\$[0-9]+]], %got(llvm_mips_copy_s_h_RES)
73 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_copy_s_w_ARG1)
77 ; MIPS32-DAG: lw [[RES:\$[0-9]+]], %got(llvm_mips_copy_s_w_RES)
96 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_copy_s_d_ARG1)
98 ; MIPS32-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
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D2r_vector_scalar.ll5 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS32
7 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS32
27 ; MIPS32-DAG: lw [[R1:\$[0-9]+]],
47 ; MIPS32-DAG: lw [[R1:\$[0-9]+]],
67 ; MIPS32-DAG: lw [[R1:\$[0-9]+]],
87 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], 0(
88 ; MIPS32-DAG: lw [[R2:\$[0-9]+]], 4(
90 ; MIPS32-DAG: ldi.b [[R3:\$w[0-9]+]], 0
91 ; MIPS32-DAG: insert.w [[R3]][0], [[R1]]
92 ; MIPS32-DAG: insert.w [[R3]][1], [[R2]]
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Dspecial.ll4 ; RUN: FileCheck %s --check-prefix=MIPS32
8 ; RUN: FileCheck %s --check-prefix=MIPS32
20 ; MIPS32: llvm_mips_lsa_test:
21 ; MIPS32: lsa {{\$[0-9]+}}, $5, $4, 2
22 ; MIPS32: .size llvm_mips_lsa_test
31 ; MIPS32: lsa_test:
32 ; MIPS32: lsa {{\$[0-9]+}}, $5, $4, 2
33 ; MIPS32: .size lsa_test
Dbasic_operations.ll3 ; RUN: FileCheck -check-prefixes=ALL,O32,MIPS32,ALL-BE %s
6 ; RUN: FileCheck -check-prefixes=ALL,O32,MIPS32,ALL-LE %s
161 ; MIPS32: ld.w [[R1:\$w[0-9]+]], 0([[G_PTR]])
168 ; MIPS32: ld.w [[R1:\$w[0-9]+]], 0([[G_PTR]])
197 ; MIPS32-DAG: lw [[R2:\$[0-9]+]], 16($sp)
198 ; MIPS32-DAG: insert.b [[R1]][4], [[R2]]
200 ; MIPS32-DAG: lw [[R3:\$[0-9]+]], 20($sp)
201 ; MIPS32-DAG: insert.b [[R1]][5], [[R3]]
203 ; MIPS32-DAG: lw [[R4:\$[0-9]+]], 24($sp)
204 ; MIPS32-DAG: insert.b [[R1]][6], [[R4]]
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Delm_insv.ll5 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS32
7 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS32
95 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], 0(
96 ; MIPS32-DAG: lw [[R2:\$[0-9]+]], 4(
98 ; MIPS32-DAG: ld.w [[R3:\$w[0-9]+]],
100 ; MIPS32-DAG: insert.w [[R3]][2], [[R1]]
101 ; MIPS32-DAG: insert.w [[R3]][3], [[R2]]
103 ; MIPS32-DAG: st.w [[R3]],
123 ; MIPS32-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_insve_b_ARG1)(
124 ; MIPS32-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_insve_b_ARG3)(
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/external/llvm/test/CodeGen/Mips/
Dcountleading.ll1 ; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck -check-prefixes=ALL,MIPS32-R1-R2,MIPS32-GT…
2 ; RUN: llc -march=mipsel -mcpu=mips32r2 < %s | FileCheck -check-prefixes=ALL,MIPS32-R1-R2,MIPS32-GT…
3 ; RUN: llc -march=mipsel -mcpu=mips32r6 < %s | FileCheck -check-prefixes=ALL,MIPS32-R6,MIPS32-GT-R1…
12 ; MIPS32-GT-R1 - MIPS64r1 and above (does not include MIPS64's)
21 ; MIPS32-GT-R1: clz $2, $4
39 ; MIPS32-GT-R1: clo $2, $4
56 ; MIPS32-GT-R1-DAG: clz $[[R0:[0-9]+]], $4
57 ; MIPS32-GT-R1-DAG: clz $[[R1:[0-9]+]], $5
58 ; MIPS32-GT-R1-DAG: addiu $[[R2:2+]], $[[R0]], 32
59 ; MIPS32-R1-R2-DAG: movn $[[R2]], $[[R1]], $5
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Dunalignedload.ll1 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=…
2 ; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=…
3 …rch=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,ALL-EL,MIPS32-EL
4 …rch=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,ALL-EB,MIPS32-EB
20 ; MIPS32-EL-DAG: lbu $[[PART1:[0-9]+]], 2($[[R0]])
21 ; MIPS32-EL-DAG: lbu $[[PART2:[0-9]+]], 3($[[R0]])
22 ; MIPS32-EL-DAG: sll $[[T0:[0-9]+]], $[[PART2]], 8
23 ; MIPS32-EL-DAG: or $4, $[[T0]], $[[PART1]]
25 ; MIPS32-EB-DAG: lbu $[[PART1:[0-9]+]], 2($[[R0]])
26 ; MIPS32-EB-DAG: lbu $[[PART2:[0-9]+]], 3($[[R0]])
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Dload-store-left-right.ll1 …UN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic < %s | FileCheck -check-pr…
2 …UN: llc -march=mips -mcpu=mips32 -relocation-model=pic < %s | FileCheck -check-pr…
3 …=mips32r2 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS32,MIPS32-EL %s
4 …=mips32r2 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS32,MIPS32-EB %s
28 ; MIPS32-EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
29 ; MIPS32-EL: lwr $[[R0]], 0($[[R1]])
31 ; MIPS32-EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
32 ; MIPS32-EB: lwr $[[R0]], 3($[[R1]])
54 ; MIPS32-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
55 ; MIPS32-EL: swr $[[R0]], 0($[[R1]])
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Dcttz-v.ll1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
8 ; MIPS32-DAG: addiu $[[R0:[0-9]+]], $4, -1
9 ; MIPS32-DAG: not $[[R1:[0-9]+]], $4
10 ; MIPS32-DAG: and $[[R2:[0-9]+]], $[[R1]], $[[R0]]
11 ; MIPS32-DAG: clz $[[R3:[0-9]+]], $[[R2]]
12 ; MIPS32-DAG: addiu $[[R4:[0-9]+]], $zero, 32
13 ; MIPS32-DAG: subu $2, $[[R4]], $[[R3]]
14 ; MIPS32-DAG: addiu $[[R5:[0-9]+]], $5, -1
15 ; MIPS32-DAG: not $[[R6:[0-9]+]], $5
16 ; MIPS32-DAG: and $[[R7:[0-9]+]], $[[R6]], $[[R5]]
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Dbswap.ll1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
7 ; MIPS32-LABEL: bswap32:
8 ; MIPS32: wsbh $[[R0:[0-9]+]]
9 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
34 ; MIPS32-LABEL: bswap64:
35 ; MIPS32: wsbh $[[R0:[0-9]+]]
36 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
37 ; MIPS32: wsbh $[[R0:[0-9]+]]
38 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
74 ; MIPS32-LABEL: bswapv4i32:
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/external/swiftshader/third_party/subzero/src/
DIceInstMIPS32.cpp1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
26 namespace MIPS32 { namespace
184 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
242 Str << "[MIPS32] "; in dump()
343 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
491 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
516 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
607 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
633 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
638 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
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/external/clang/test/Driver/
Dfreebsd-mips-as.c5 // RUN: | FileCheck -check-prefix=MIPS32-EB-AS %s
6 // MIPS32-EB-AS: as{{(.exe)?}}" "-march" "mips32r2" "-mabi" "32" "-EB"
7 // MIPS32-EB-AS-NOT: "-KPIC"
11 // RUN: | FileCheck -check-prefix=MIPS32-EB-PIC %s
12 // MIPS32-EB-PIC: as{{(.exe)?}}" "-march" "mips32r2" "-mabi" "32" "-EB"
13 // MIPS32-EB-PIC: "-KPIC"
17 // RUN: | FileCheck -check-prefix=MIPS32-EB-PIC-SMALL %s
18 // MIPS32-EB-PIC-SMALL: as{{(.exe)?}}" "-march" "mips32r2" "-mabi" "32" "-EB"
19 // MIPS32-EB-PIC-SMALL: "-KPIC"
23 // RUN: | FileCheck -check-prefix=MIPS32-EB-PIE %s
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Dmips-eleb.c5 // RUN: | FileCheck -check-prefix=MIPS32-EL %s
6 // MIPS32-EL: "{{.*}}clang{{.*}}" "-cc1" "-triple" "mipsel-unknown-linux-gnu"
7 // MIPS32-EL: "{{.*}}as{{(.exe)?}}" "-march" "mips32r2" "-mabi" "32"
8 // MIPS32-EL: "-EL"
9 // MIPS32-EL: "{{.*}}ld{{(.exe)?}}" {{.*}} "-m" "elf32ltsmip"
21 // RUN: | FileCheck -check-prefix=MIPS32-EB %s
22 // MIPS32-EB: "{{.*}}clang{{.*}}" "-cc1" "-triple" "mips-unknown-linux-gnu"
23 // MIPS32-EB: "{{.*}}as{{(.exe)?}}" "-march" "mips32r2" "-mabi" "32"
24 // MIPS32-EB: "-EB"
25 // MIPS32-EB: "{{.*}}ld{{(.exe)?}}" {{.*}} "-m" "elf32btsmip"
Dmips-ias-Wa.s76 // RUN: %clang -target mips-linux-gnu -### -fintegrated-as -c %s -Wa,-mips32 2>&1 | \
77 // RUN: FileCheck -check-prefix=MIPS32 %s
78 // MIPS32: -cc1as
79 // MIPS32: "-target-feature" "+mips32"
133 // RUN: %clang -target mips-linux-gnu -### -fintegrated-as -c %s -Wa,-mips64,-mips32,-mips32r2 2>&1…
134 // RUN: FileCheck -check-prefix=MIPS64-MIPS32-MIPS32R2 %s
135 // MIPS64-MIPS32-MIPS32R2: -cc1as
136 // MIPS64-MIPS32-MIPS32R2-NOT: "-target-feature" "+mips64"
137 // MIPS64-MIPS32-MIPS32R2-NOT: "-target-feature" "+mips32"
138 // MIPS64-MIPS32-MIPS32R2: "-target-feature" "+mips32r2"
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/external/llvm/test/MC/Mips/
Deh-frame.s7 // RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS32 %s
22 // MIPS32: RELOCATION RECORDS FOR [.rel.eh_frame]:
23 // MIPS32-NEXT: R_MIPS_32
24 // MIPS32: Contents of section .eh_frame:
25 // MIPS32-NEXT: 0000
28 // MIPS32: 00000010
31 // MIPS32: 00000000
34 // MIPS32: 01
37 // MIPS32: 7a5200
40 // MIPS32: 01
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Dset-mips-directives.s16 .set mips32 define
20 .set mips32 define
23 .set mips32 define
52 # CHECK: .set mips32
56 # CHECK: .set mips32
59 # CHECK: .set mips32
Dset-arch.s1 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 | \
15 .set arch=mips32
19 .set arch=mips32
22 .set arch=mips32
54 # CHECK: .set arch=mips32
Dmacro-ddiv-bad.s2 # RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
4 # RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
6 # RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
12 …# MIPS32-OR-R6: :[[@LINE-1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently e…
Dmacro-ddivu-bad.s2 # RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
4 # RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
6 # RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
12 …# MIPS32-OR-R6: :[[@LINE-1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently e…
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Dsimplestorefp1.ll3 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
7 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
8 ; RUN: < %s | FileCheck %s -check-prefix=mips32
41 ; mips32: .ent d1
42 ; mips32: lui $[[REG1a:[0-9]+]], 16371
43 ; mips32: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353
44 ; mips32: lui $[[REG1b:[0-9]+]], 21403
45 ; mips32: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951
46 ; mips32: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]
47 ; mips32: mtc1 $[[REG2a]], $f{{[0-9]+}}
[all …]
Dloadstoreconv.ll3 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
7 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
8 ; RUN: < %s | FileCheck %s -check-prefix=mips32
72 ; mips32-LABEL: .ent _Z4sc_iv
82 ; mips32: lbu $[[REG1:[0-9]+]], 0(${{[0-9]+}})
83 ; mips32: sll $[[REG2:[0-9]+]], $[[REG1]], 24
84 ; mips32: sra ${{[0-9]+}}, $[[REG2]], 24
110 ; mips32=LABEL: .ent _Z4ss_iv
120 ; mips32: lhu $[[REG1:[0-9]+]], 0(${{[0-9]+}})
121 ; mips32: sll $[[REG2:[0-9]+]], $[[REG1]], 16
[all …]
/external/llvm/test/CodeGen/Mips/cstmaterialization/
Dstack.ll1 ; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefix=CHECK-MIPS32
19 ; CHECK-MIPS32: lui $[[R0:[0-9]+]], 16
20 ; CHECK-MIPS32: addiu $[[R0]], $[[R0]], 24
21 ; CHECK-MIPS32: subu $sp, $sp, $[[R0]]
23 ; CHECK-MIPS32: lui $[[R1:[0-9]+]], 16
24 ; CHECK-MIPS32: addiu $[[R1]], $[[R1]], 24
25 ; CHECK-MIPS32: addu $sp, $sp, $[[R1]]
/external/clang/test/CodeGen/
Datomics-inlining.c4 // RUN: %clang_cc1 -triple mipsel-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS32
71 // MIPS32-LABEL: define void @test1 in test1()
72 // MIPS32: = load atomic i8, i8* @c1 seq_cst in test1()
73 // MIPS32: store atomic i8 {{.*}}, i8* @c1 seq_cst in test1()
74 // MIPS32: = load atomic i16, i16* @s1 seq_cst in test1()
75 // MIPS32: store atomic i16 {{.*}}, i16* @s1 seq_cst in test1()
76 // MIPS32: = load atomic i32, i32* @i1 seq_cst in test1()
77 // MIPS32: store atomic i32 {{.*}}, i32* @i1 seq_cst in test1()
78 // MIPS32: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) in test1()
79 // MIPS32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 in test1()
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