| /external/trusty/arm-trusted-firmware/lib/cpus/ |
| D | cpu-ops.mk | 41 # These should be enabled by the platform if the erratum workaround needs to be
44 # Flag to apply erratum 794073 workaround when disabling mmu.
47 # Flag to apply erratum 816470 workaround during power down. This erratum
51 # Flag to apply erratum 827671 workaround during reset. This erratum applies
55 # Flag to apply erratum 852421 workaround during reset. This erratum applies
59 # Flag to apply erratum 852423 workaround during reset. This erratum applies
63 # Flag to apply erratum 855472 workaround during reset. This erratum applies
67 # Flag to apply erratum 819472 workaround during reset. This erratum applies
71 # Flag to apply erratum 824069 workaround during reset. This erratum applies
75 # Flag to apply erratum 826319 workaround during reset. This erratum applies
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| /external/trusty/arm-trusted-firmware/docs/design/ |
| D | cpu-specific-build-macros.rst | 14 - ``WORKAROUND_CVE_2017_5715``: Enables the security workaround for
16 of the PEs in the system need the workaround. Setting this flag to 0 provides
18 with the recommendation in the spec regarding workaround discovery.
21 - ``WORKAROUND_CVE_2018_3639``: Enables the security workaround for
25 regarding workaround discovery.
51 errata workaround is identified by its ``ID`` as specified in the processor's
53 errata workaround is ``ERRATA_<Processor name>_<ID>``, where the ``Processor name``
57 write errata workaround functions.
61 errata workaround build flags in the platform specific makefile. In case
63 workaround is not applied. In the DEBUG build, this is indicated by
[all …]
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| /external/arm-trusted-firmware/docs/design/ |
| D | cpu-specific-build-macros.rst | 14 - ``WORKAROUND_CVE_2017_5715``: Enables the security workaround for
16 of the PEs in the system need the workaround. Setting this flag to 0 provides
18 with the recommendation in the spec regarding workaround discovery.
21 - ``WORKAROUND_CVE_2018_3639``: Enables the security workaround for
25 regarding workaround discovery.
47 errata workaround is identified by its ``ID`` as specified in the processor's
49 errata workaround is ``ERRATA_<Processor name>_<ID>``, where the ``Processor name``
53 write errata workaround functions.
57 errata workaround build flags in the platform specific makefile. In case
59 workaround is not applied. In the DEBUG build, this is indicated by
[all …]
|
| /external/arm-trusted-firmware/lib/cpus/ |
| D | cpu-ops.mk | 69 # These should be enabled by the platform if the erratum workaround needs to be
72 # Flag to apply erratum 794073 workaround when disabling mmu.
75 # Flag to apply erratum 816470 workaround during power down. This erratum
79 # Flag to apply erratum 827671 workaround during reset. This erratum applies
83 # Flag to apply erratum 852421 workaround during reset. This erratum applies
87 # Flag to apply erratum 852423 workaround during reset. This erratum applies
91 # Flag to apply erratum 855472 workaround during reset. This erratum applies
95 # Flag to apply erratum 819472 workaround during reset. This erratum applies
99 # Flag to apply erratum 824069 workaround during reset. This erratum applies
103 # Flag to apply erratum 826319 workaround during reset. This erratum applies
[all …]
|
| /external/trusty/arm-trusted-firmware/plat/nxp/common/soc_errata/ |
| D | errata.c | 15 INFO("SoC workaround for Errata A050426 was applied\n"); in soc_errata()
19 INFO("SoC workaround for Errata A008850 Early-Phase was applied\n"); in soc_errata()
23 INFO("SoC workaround for Errata A009660 was applied\n"); in soc_errata()
27 INFO("SoC workaround for Errata A010539 was applied\n"); in soc_errata()
32 * The following DDR Erratas workaround are implemented in DDR driver, in soc_errata()
36 INFO("SoC workaround for DDR Errata A011396 was applied\n"); in soc_errata()
39 INFO("SoC workaround for DDR Errata A050450 was applied\n"); in soc_errata()
42 INFO("SoC workaround for DDR Errata A050958 was applied\n"); in soc_errata()
45 INFO("SoC workaround for DDR Errata A008511 was applied\n"); in soc_errata()
48 INFO("SoC workaround for DDR Errata A009803 was applied\n"); in soc_errata()
[all …]
|
| /external/sdv/vsomeip/third_party/boost/process/include/boost/process/detail/windows/ |
| D | group_handle.hpp | 19 workaround::JOBOBJECT_EXTENDED_LIMIT_INFORMATION_ info; in break_away_enabled()
21 if (!workaround::query_information_job_object( in break_away_enabled()
23 workaround::JobObjectExtendedLimitInformation_, in break_away_enabled()
29 … return (info.BasicLimitInformation.LimitFlags & workaround::JOB_OBJECT_LIMIT_BREAKAWAY_OK_) != 0; in break_away_enabled()
34 workaround::JOBOBJECT_EXTENDED_LIMIT_INFORMATION_ info; in enable_break_away()
36 if (!workaround::query_information_job_object( in enable_break_away()
38 workaround::JobObjectExtendedLimitInformation_, in enable_break_away()
44 if ((info.BasicLimitInformation.LimitFlags & workaround::JOB_OBJECT_LIMIT_BREAKAWAY_OK_) != 0) in enable_break_away()
47 info.BasicLimitInformation.LimitFlags |= workaround::JOB_OBJECT_LIMIT_BREAKAWAY_OK_; in enable_break_away()
49 if (!workaround::set_information_job_object( in enable_break_away()
[all …]
|
| D | handles.hpp | 33 auto info_pointer = reinterpret_cast<workaround::SYSTEM_HANDLE_INFORMATION_*>(buffer.data()); in get_handles()
39 nt_status = workaround::nt_system_query_information( in get_handles()
40 workaround::SystemHandleInformation_, in get_handles()
45 info_pointer = reinterpret_cast<workaround::SYSTEM_HANDLE_INFORMATION_*>(buffer.data()); in get_handles()
82 auto nt_status = workaround::nt_query_object( in is_stream_handle()
84 workaround::ObjectTypeInformation, in is_stream_handle()
91 …workaround::OBJECT_TYPE_INFORMATION_ * type_info_p = reinterpret_cast<workaround::OBJECT_TYPE_INFO… in is_stream_handle()
92 nt_status = workaround::nt_query_object( in is_stream_handle()
94 workaround::ObjectTypeInformation, in is_stream_handle()
|
| /external/arm-trusted-firmware/lib/cpus/aarch64/ |
| D | neoverse_v1.S | 25 * Errata Workaround for Neoverse V1 Errata #1774420.
32 /* Check workaround compatibility. */
53 * Errata Workaround for Neoverse V1 Errata #1791573.
60 /* Check workaround compatibility. */
81 * Errata Workaround for Neoverse V1 Errata #1852267.
88 /* Check workaround compatibility. */
109 * Errata Workaround for Neoverse V1 Errata #1925756.
116 /* Check workaround compatibility. */
137 * Errata Workaround for Neoverse V1 Erratum #1940577
192 * Errata Workaround for Neoverse V1 Errata #1966096
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|
| D | wa_cve_2017_5715_bpiall.S | 45 /* Preserve 32-bit system registers in GP registers through the workaround */
54 * through the workaround. This is OK because at this point the
56 * register, which is unmodified by the workaround.
68 /* Switch EL3 exception vectors while the workaround is executing. */
74 /* Land at the S-EL1 workaround stub */
91 * This vector table is used at runtime to enter the workaround at
92 * AArch32 S-EL1 for Sync/IRQ/FIQ/SError exceptions. If the workaround
192 * This vector table is used while the workaround is executing. It
194 * workaround stubs to enter EL3 from S-EL1. It restores the previous
280 * Workaround is complete, so swap VBAR_EL3 to point
[all …]
|
| D | neoverse_n1.S | 27 * Errata Workaround for Neoverse N1 Erratum 1043202.
81 * Errata Workaround for Neoverse N1 Errata #1073348
107 * Errata Workaround for Neoverse N1 Errata #1130799
133 * Errata Workaround for Neoverse N1 Errata #1165347
160 * Errata Workaround for Neoverse N1 Errata #1207823
186 * Errata Workaround for Neoverse N1 Errata #1220197
212 * Errata Workaround for Neoverse N1 Errata #1257314
238 * Errata Workaround for Neoverse N1 Errata #1262606
264 * Errata Workaround for Neoverse N1 Errata #1262888
290 * Errata Workaround for Neoverse N1 Errata #1275112
[all …]
|
| /external/oboe/samples/RhythmGame/third_party/glm/detail/ |
| D | _fixes.hpp | 6 //! Workaround for compatibility with other libraries
11 //! Workaround for compatibility with other libraries
16 //! Workaround for Android
21 //! Workaround for Android
26 //! Workaround for Chrone Native Client
|
| /external/sdv/vsomeip/third_party/boost/mpl/include/boost/mpl/aux_/preprocessed/msvc70/ |
| D | apply_wrap.hpp | 29 /// workaround for ETI bug
49 /// workaround for ETI bug
69 /// workaround for ETI bug
89 /// workaround for ETI bug
109 /// workaround for ETI bug
130 /// workaround for ETI bug
|
| D | apply.hpp | 31 /// workaround for ETI bug
55 /// workaround for ETI bug
79 /// workaround for ETI bug
103 /// workaround for ETI bug
127 /// workaround for ETI bug
152 /// workaround for ETI bug
|
| /external/trusty/arm-trusted-firmware/docs/plat/ |
| D | qti-msm8916.rst | 162 INFO: BL31: cortex_a53: CPU workaround for 819472 was applied
163 INFO: BL31: cortex_a53: CPU workaround for 824069 was applied
164 INFO: BL31: cortex_a53: CPU workaround for 826319 was applied
165 INFO: BL31: cortex_a53: CPU workaround for 827319 was applied
166 INFO: BL31: cortex_a53: CPU workaround for 835769 was applied
167 INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied
168 INFO: BL31: cortex_a53: CPU workaround for 843419 was applied
169 INFO: BL31: cortex_a53: CPU workaround for 1530924 was applied
191 INFO: BL32: cortex_a53: CPU workaround for 819472 was applied
192 INFO: BL32: cortex_a53: CPU workaround for 824069 was applied
[all …]
|
| /external/grpc-grpc/doc/ |
| D | workarounds.md | 4 …mplemented on gRPC servers for record and reference when users need to enable a certain workaround.
6 ## Workaround List
10 **Workaround ID:** WORKAROUND\_ID\_CRONET\_COMPRESSION
19 **Workaround Description:** Implemented as a server channel filter in C core. The filter identifie…
|
| /external/sdv/vsomeip/third_party/boost/mpl/include/boost/mpl/aux_/preprocessed/msvc60/ |
| D | apply.hpp | 32 /// workaround for ETI bug
57 /// workaround for ETI bug
82 /// workaround for ETI bug
107 /// workaround for ETI bug
132 /// workaround for ETI bug
158 /// workaround for ETI bug
|
| D | advance_backward.hpp | 24 /// ETI workaround
42 /// ETI workaround
61 /// ETI workaround
81 /// ETI workaround
102 /// ETI workaround
|
| D | advance_forward.hpp | 24 /// ETI workaround
42 /// ETI workaround
61 /// ETI workaround
81 /// ETI workaround
102 /// ETI workaround
|
| D | apply_wrap.hpp | 44 /// workaround for ETI bug
80 /// workaround for ETI bug
116 /// workaround for ETI bug
152 /// workaround for ETI bug
194 /// workaround for ETI bug
239 /// workaround for ETI bug
|
| D | iter_fold_impl.hpp | 44 /// ETI workaround
73 /// ETI workaround
104 /// ETI workaround
137 /// ETI workaround
172 /// ETI workaround
252 /// ETI workaround
|
| /external/mesa3d/src/intel/dev/ |
| D | gen_wa_helpers.py | 90 /* These defines may be used to compile out genxml workaround implementations
213 """provide a map of workaround id -> GFX_VERx10 macro test"""
230 """provide a map of workaround id -> true/false, indicating whether the wa
266 for workaround, bug in wa_def.items():
269 # stepping-specific workaround, not platform-wide
271 platform_bugs[platform].append(workaround)
277 for workaround, bug in wa_def.items():
293 stepping_bugs[platform][u_step].append(workaround)
301 help="json data file with workaround definitions")
306 print(f"Error: workaround definition not found: {args.wa_file}")
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|
| /external/arm-trusted-firmware/plat/nxp/common/soc_errata/ |
| D | errata.c | 15 INFO("SoC workaround for Errata A050426 was applied\n"); in soc_errata()
19 * The following DDR Erratas workaround are implemented in DDR driver, in soc_errata()
23 INFO("SoC workaround for DDR Errata A011396 was applied\n"); in soc_errata()
26 INFO("SoC workaround for DDR Errata A050450 was applied\n"); in soc_errata()
|
| /external/tensorflow/tensorflow/compiler/xla/g3doc/ |
| D | known_issues.md | 18 placed on a GPU. As a workaround, `int64` can be used.
30 *Workaround*: compile the outermost scope which is taking the derivative.
44 *Workaround*: all compiled while loops need to either have `maximum_iterations`
54 *Workaround*: provide a statically known bound to your arrays.
64 *Workaround*: use
83 *Workaround*: Unroll loops, e.g. by converting `tf.range` into Python `range`.
|
| /external/trusty/arm-trusted-firmware/lib/cpus/aarch64/ |
| D | wa_cve_2017_5715_bpiall.S | 45 /* Preserve 32-bit system registers in GP registers through the workaround */
54 * through the workaround. This is OK because at this point the
56 * register, which is unmodified by the workaround.
68 /* Switch EL3 exception vectors while the workaround is executing. */
74 /* Land at the S-EL1 workaround stub */
91 * This vector table is used at runtime to enter the workaround at
92 * AArch32 S-EL1 for Sync/IRQ/FIQ/SError exceptions. If the workaround
192 * This vector table is used while the workaround is executing. It
194 * workaround stubs to enter EL3 from S-EL1. It restores the previous
280 * Workaround is complete, so swap VBAR_EL3 to point
[all …]
|
| /external/trusty/arm-trusted-firmware/docs/security_advisories/ |
| D | security-advisory-tfv-9.rst | 42 inserting a loop workaround with implementation specific number of iterations
50 TF-A using the loop workaround(all cores that implement FEAT_CSV2 except the
97 In case local workaround is not feasible, the Rich OS can invoke the SMC
98 (``SMCCC_ARCH_WORKAROUND_3``) to apply the workaround. Refer to `SMCCC Calling
102 workaround for CPUs mentioned in the above table. For CPUs supporting
103 speculative barrier instruction, the loop workaround is optimised by using SB
107 `CVE-2022-23960`_ workaround SMC(``SMCCC_ARCH_WORKAROUND_3``) for use by normal
112 Cortex-A57, Coxtex-A72, Cortex-A73 and Cortex-A75 using the existing workaround.
115 The above workaround is enabled by default (on vulnerable CPUs only). Platforms
|