1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7 #include "ac_debug.h"
8 #include "sid.h"
9 #include "sid_tables.h"
10
11 #include "util/compiler.h"
12 #include "util/u_debug.h"
13 #include "util/u_math.h"
14 #include "util/memstream.h"
15 #include "util/u_string.h"
16
17 #include <stdlib.h>
18
19 #ifdef HAVE_VALGRIND
20 #include <memcheck.h>
21 #include <valgrind.h>
22 #endif
23
24 DEBUG_GET_ONCE_BOOL_OPTION(color, "AMD_COLOR", true);
25
26 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
27 * read them, or use "aha -b -f file" to convert them to html.
28 */
29 #define COLOR_RESET "\033[0m"
30 #define COLOR_RED "\033[31m"
31 #define COLOR_GREEN "\033[1;32m"
32 #define COLOR_YELLOW "\033[1;33m"
33 #define COLOR_CYAN "\033[1;36m"
34 #define COLOR_PURPLE "\033[1;35m"
35
36 #define O_COLOR_RESET (debug_get_option_color() ? COLOR_RESET : "")
37 #define O_COLOR_RED (debug_get_option_color() ? COLOR_RED : "")
38 #define O_COLOR_GREEN (debug_get_option_color() ? COLOR_GREEN : "")
39 #define O_COLOR_YELLOW (debug_get_option_color() ? COLOR_YELLOW : "")
40 #define O_COLOR_CYAN (debug_get_option_color() ? COLOR_CYAN : "")
41 #define O_COLOR_PURPLE (debug_get_option_color() ? COLOR_PURPLE : "")
42
43 #define INDENT_PKT 8
44
45 struct ac_ib_parser {
46 FILE *f;
47 uint32_t *ib;
48 unsigned num_dw;
49 const int *trace_ids;
50 unsigned trace_id_count;
51 enum amd_gfx_level gfx_level;
52 enum radeon_family family;
53 ac_debug_addr_callback addr_callback;
54 void *addr_callback_data;
55
56 unsigned cur_dw;
57 };
58
59 static void parse_gfx_compute_ib(FILE *f, struct ac_ib_parser *ib);
60
print_spaces(FILE * f,unsigned num)61 static void print_spaces(FILE *f, unsigned num)
62 {
63 fprintf(f, "%*s", num, "");
64 }
65
print_value(FILE * file,uint32_t value,int bits)66 static void print_value(FILE *file, uint32_t value, int bits)
67 {
68 /* Guess if it's int or float */
69 if (value <= (1 << 15)) {
70 if (value <= 9)
71 fprintf(file, "%u\n", value);
72 else
73 fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value);
74 } else {
75 float f = uif(value);
76
77 if (fabs(f) < 100000 && f * 10 == floor(f * 10))
78 fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value);
79 else
80 /* Don't print more leading zeros than there are bits. */
81 fprintf(file, "0x%0*x\n", bits / 4, value);
82 }
83 }
84
print_data_dword(FILE * file,uint32_t value,const char * comment)85 static void print_data_dword(FILE *file, uint32_t value, const char *comment)
86 {
87 print_spaces(file, INDENT_PKT);
88 fprintf(file, "(%s)\n", comment);
89 }
90
print_named_value(FILE * file,const char * name,uint32_t value,int bits)91 static void print_named_value(FILE *file, const char *name, uint32_t value, int bits)
92 {
93 print_spaces(file, INDENT_PKT);
94 fprintf(file, "%s%s%s <- ",
95 O_COLOR_YELLOW, name,
96 O_COLOR_RESET);
97 print_value(file, value, bits);
98 }
99
print_string_value(FILE * file,const char * name,const char * value)100 static void print_string_value(FILE *file, const char *name, const char *value)
101 {
102 print_spaces(file, INDENT_PKT);
103 fprintf(file, "%s%s%s <- ",
104 O_COLOR_YELLOW, name,
105 O_COLOR_RESET);
106 fprintf(file, "%s\n", value);
107 }
108
ac_dump_reg(FILE * file,enum amd_gfx_level gfx_level,enum radeon_family family,unsigned offset,uint32_t value,uint32_t field_mask)109 void ac_dump_reg(FILE *file, enum amd_gfx_level gfx_level, enum radeon_family family,
110 unsigned offset, uint32_t value, uint32_t field_mask)
111 {
112 const struct si_reg *reg = ac_find_register(gfx_level, family, offset);
113
114 if (reg) {
115 const char *reg_name = sid_strings + reg->name_offset;
116 bool first_field = true;
117
118 print_spaces(file, INDENT_PKT);
119 fprintf(file, "%s%s%s <- ",
120 O_COLOR_YELLOW, reg_name,
121 O_COLOR_RESET);
122
123 if (!reg->num_fields) {
124 print_value(file, value, 32);
125 return;
126 }
127
128 for (unsigned f = 0; f < reg->num_fields; f++) {
129 const struct si_field *field = sid_fields_table + reg->fields_offset + f;
130 const int *values_offsets = sid_strings_offsets + field->values_offset;
131 uint32_t val = (value & field->mask) >> (ffs(field->mask) - 1);
132
133 if (!(field->mask & field_mask))
134 continue;
135
136 /* Indent the field. */
137 if (!first_field)
138 print_spaces(file, INDENT_PKT + strlen(reg_name) + 4);
139
140 /* Print the field. */
141 fprintf(file, "%s = ", sid_strings + field->name_offset);
142
143 if (val < field->num_values && values_offsets[val] >= 0)
144 fprintf(file, "%s\n", sid_strings + values_offsets[val]);
145 else
146 print_value(file, val, util_bitcount(field->mask));
147
148 first_field = false;
149 }
150 return;
151 }
152
153 print_spaces(file, INDENT_PKT);
154 fprintf(file, "%s0x%05x%s <- 0x%08x\n",
155 O_COLOR_YELLOW, offset,
156 O_COLOR_RESET, value);
157 }
158
ac_ib_get(struct ac_ib_parser * ib)159 static uint32_t ac_ib_get(struct ac_ib_parser *ib)
160 {
161 uint32_t v = 0;
162
163 if (ib->cur_dw < ib->num_dw) {
164 v = ib->ib[ib->cur_dw];
165 #ifdef HAVE_VALGRIND
166 /* Help figure out where garbage data is written to IBs.
167 *
168 * Arguably we should do this already when the IBs are written,
169 * see RADEON_VALGRIND. The problem is that client-requests to
170 * Valgrind have an overhead even when Valgrind isn't running,
171 * and radeon_emit is performance sensitive...
172 */
173 if (VALGRIND_CHECK_VALUE_IS_DEFINED(v))
174 fprintf(ib->f, "%sValgrind: The next DWORD is garbage%s\n",
175 debug_get_option_color() ? COLOR_RED : "", O_COLOR_RESET);
176 #endif
177 fprintf(ib->f, "\n\035#%08x ", v);
178 } else {
179 fprintf(ib->f, "\n\035#???????? ");
180 }
181
182 ib->cur_dw++;
183 return v;
184 }
185
ac_ib_get64(struct ac_ib_parser * ib)186 static uint64_t ac_ib_get64(struct ac_ib_parser *ib)
187 {
188 uint32_t lo = ac_ib_get(ib);
189 uint32_t hi = ac_ib_get(ib);
190 return ((uint64_t)hi << 32) | lo;
191 }
192
ac_sext_addr48(uint64_t addr)193 static uint64_t ac_sext_addr48(uint64_t addr)
194 {
195 if (addr & (1llu << 47))
196 return addr | (0xFFFFllu << 48);
197 else
198 return addr & (~(0xFFFFllu << 48));
199 }
200
ac_parse_set_reg_packet(FILE * f,unsigned count,unsigned reg_offset,struct ac_ib_parser * ib)201 static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset,
202 struct ac_ib_parser *ib)
203 {
204 unsigned reg_dw = ac_ib_get(ib);
205 unsigned reg = ((reg_dw & 0xFFFF) << 2) + reg_offset;
206 unsigned index = reg_dw >> 28;
207 int i;
208
209 if (index != 0)
210 print_named_value(f, "INDEX", index, 32);
211
212 for (i = 0; i < count; i++)
213 ac_dump_reg(f, ib->gfx_level, ib->family, reg + i * 4, ac_ib_get(ib), ~0);
214 }
215
ac_parse_set_reg_pairs_packet(FILE * f,unsigned count,unsigned reg_base,struct ac_ib_parser * ib)216 static void ac_parse_set_reg_pairs_packet(FILE *f, unsigned count, unsigned reg_base,
217 struct ac_ib_parser *ib)
218 {
219 for (unsigned i = 0; i < (count + 1) / 2; i++) {
220 unsigned reg_offset = (ac_ib_get(ib) << 2) + reg_base;
221 ac_dump_reg(f, ib->gfx_level, ib->family, reg_offset, ac_ib_get(ib), ~0);
222 }
223 }
224
ac_parse_set_reg_pairs_packed_packet(FILE * f,unsigned count,unsigned reg_base,struct ac_ib_parser * ib)225 static void ac_parse_set_reg_pairs_packed_packet(FILE *f, unsigned count, unsigned reg_base,
226 struct ac_ib_parser *ib)
227 {
228 unsigned reg_offset0 = 0, reg_offset1 = 0;
229
230 print_named_value(f, "REG_COUNT", ac_ib_get(ib), 32);
231
232 for (unsigned i = 0; i < count; i++) {
233 if (i % 3 == 0) {
234 unsigned tmp = ac_ib_get(ib);
235 reg_offset0 = ((tmp & 0xffff) << 2) + reg_base;
236 reg_offset1 = ((tmp >> 16) << 2) + reg_base;
237 } else if (i % 3 == 1) {
238 ac_dump_reg(f, ib->gfx_level, ib->family, reg_offset0, ac_ib_get(ib), ~0);
239 } else {
240 ac_dump_reg(f, ib->gfx_level, ib->family, reg_offset1, ac_ib_get(ib), ~0);
241 }
242 }
243 }
244
245 #define AC_ADDR_SIZE_NOT_MEMORY 0xFFFFFFFF
246
print_addr(struct ac_ib_parser * ib,const char * name,uint64_t addr,uint32_t size)247 static void print_addr(struct ac_ib_parser *ib, const char *name, uint64_t addr, uint32_t size)
248 {
249 FILE *f = ib->f;
250
251 print_spaces(f, INDENT_PKT);
252 fprintf(f, "%s%s%s <- ",
253 O_COLOR_YELLOW, name,
254 O_COLOR_RESET);
255
256 fprintf(f, "0x%llx", (unsigned long long)addr);
257
258 if (ib->addr_callback && size != AC_ADDR_SIZE_NOT_MEMORY) {
259 struct ac_addr_info addr_info;
260 ib->addr_callback(ib->addr_callback_data, addr, &addr_info);
261
262 struct ac_addr_info addr_info2 = addr_info;
263 if (size)
264 ib->addr_callback(ib->addr_callback_data, addr + size - 1, &addr_info2);
265
266 uint32_t invalid_count = !addr_info.valid + !addr_info2.valid;
267
268 if (addr_info.use_after_free && addr_info2.use_after_free)
269 fprintf(f, " used after free");
270 else if (invalid_count == 2)
271 fprintf(f, " invalid");
272 else if (invalid_count == 1)
273 fprintf(f, " out of bounds");
274 }
275
276 fprintf(f, "\n");
277 }
278
ac_parse_packet3(FILE * f,uint32_t header,struct ac_ib_parser * ib,int * current_trace_id)279 static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib,
280 int *current_trace_id)
281 {
282 unsigned first_dw = ib->cur_dw;
283 int count = PKT_COUNT_G(header);
284 unsigned op = PKT3_IT_OPCODE_G(header);
285 const char *shader_type = PKT3_SHADER_TYPE_G(header) ? "(shader_type=compute)" : "";
286 const char *predicated = PKT3_PREDICATE(header) ? "(predicated)" : "";
287 const char *reset_filter_cam = PKT3_RESET_FILTER_CAM_G(header) ? "(reset_filter_cam)" : "";
288 int i;
289 unsigned tmp;
290
291 /* Print the name first. */
292 for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
293 if (packet3_table[i].op == op)
294 break;
295
296 char unknown_name[32];
297 const char *pkt_name;
298
299 if (i < ARRAY_SIZE(packet3_table)) {
300 pkt_name = sid_strings + packet3_table[i].name_offset;
301 } else {
302 snprintf(unknown_name, sizeof(unknown_name), "UNKNOWN(0x%02X)", op);
303 pkt_name = unknown_name;
304 }
305 const char *color;
306
307 if (strstr(pkt_name, "DRAW") || strstr(pkt_name, "DISPATCH"))
308 color = O_COLOR_PURPLE;
309 else if (strstr(pkt_name, "SET") == pkt_name && strstr(pkt_name, "REG"))
310 color = O_COLOR_CYAN;
311 else if (i >= ARRAY_SIZE(packet3_table))
312 color = O_COLOR_RED;
313 else
314 color = O_COLOR_GREEN;
315
316 fprintf(f, "%s%s%s%s%s%s:\n", color, pkt_name, O_COLOR_RESET,
317 shader_type, predicated, reset_filter_cam);
318
319 /* Print the contents. */
320 switch (op) {
321 case PKT3_SET_CONTEXT_REG:
322 ac_parse_set_reg_packet(f, count, SI_CONTEXT_REG_OFFSET, ib);
323 break;
324 case PKT3_SET_CONFIG_REG:
325 ac_parse_set_reg_packet(f, count, SI_CONFIG_REG_OFFSET, ib);
326 break;
327 case PKT3_SET_UCONFIG_REG:
328 case PKT3_SET_UCONFIG_REG_INDEX:
329 ac_parse_set_reg_packet(f, count, CIK_UCONFIG_REG_OFFSET, ib);
330 break;
331 case PKT3_SET_SH_REG:
332 case PKT3_SET_SH_REG_INDEX:
333 ac_parse_set_reg_packet(f, count, SI_SH_REG_OFFSET, ib);
334 break;
335 case PKT3_SET_CONTEXT_REG_PAIRS:
336 ac_parse_set_reg_pairs_packet(f, count, SI_CONTEXT_REG_OFFSET, ib);
337 break;
338 case PKT3_SET_SH_REG_PAIRS:
339 ac_parse_set_reg_pairs_packet(f, count, SI_SH_REG_OFFSET, ib);
340 break;
341 case PKT3_SET_CONTEXT_REG_PAIRS_PACKED:
342 ac_parse_set_reg_pairs_packed_packet(f, count, SI_CONTEXT_REG_OFFSET, ib);
343 break;
344 case PKT3_SET_SH_REG_PAIRS_PACKED:
345 case PKT3_SET_SH_REG_PAIRS_PACKED_N:
346 ac_parse_set_reg_pairs_packed_packet(f, count, SI_SH_REG_OFFSET, ib);
347 break;
348 case PKT3_ACQUIRE_MEM:
349 if (ib->gfx_level >= GFX11) {
350 if (G_585_PWS_ENA(ib->ib[ib->cur_dw + 5])) {
351 ac_dump_reg(f, ib->gfx_level, ib->family, R_580_ACQUIRE_MEM_PWS_2, ac_ib_get(ib), ~0);
352 print_named_value(f, "GCR_SIZE", ac_ib_get(ib), 32);
353 print_named_value(f, "GCR_SIZE_HI", ac_ib_get(ib), 25);
354 print_named_value(f, "GCR_BASE_LO", ac_ib_get(ib), 32);
355 print_named_value(f, "GCR_BASE_HI", ac_ib_get(ib), 32);
356 ac_dump_reg(f, ib->gfx_level, ib->family, R_585_ACQUIRE_MEM_PWS_7, ac_ib_get(ib), ~0);
357 ac_dump_reg(f, ib->gfx_level, ib->family, R_586_GCR_CNTL, ac_ib_get(ib), ~0);
358 } else {
359 print_string_value(f, "ENGINE_SEL", ac_ib_get(ib) & 0x80000000 ? "ME" : "PFP");
360 print_named_value(f, "GCR_SIZE", ac_ib_get(ib), 32);
361 print_named_value(f, "GCR_SIZE_HI", ac_ib_get(ib), 25);
362 print_named_value(f, "GCR_BASE_LO", ac_ib_get(ib), 32);
363 print_named_value(f, "GCR_BASE_HI", ac_ib_get(ib), 32);
364 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
365 ac_dump_reg(f, ib->gfx_level, ib->family, R_586_GCR_CNTL, ac_ib_get(ib), ~0);
366 }
367 } else {
368 tmp = ac_ib_get(ib);
369 ac_dump_reg(f, ib->gfx_level, ib->family, R_0301F0_CP_COHER_CNTL, tmp, 0x7fffffff);
370 print_string_value(f, "ENGINE_SEL", tmp & 0x80000000 ? "ME" : "PFP");
371 ac_dump_reg(f, ib->gfx_level, ib->family, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
372 ac_dump_reg(f, ib->gfx_level, ib->family, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0);
373 ac_dump_reg(f, ib->gfx_level, ib->family, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
374 ac_dump_reg(f, ib->gfx_level, ib->family, R_0301E4_CP_COHER_BASE_HI, ac_ib_get(ib), ~0);
375 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
376 if (ib->gfx_level >= GFX10)
377 ac_dump_reg(f, ib->gfx_level, ib->family, R_586_GCR_CNTL, ac_ib_get(ib), ~0);
378 }
379 break;
380 case PKT3_SURFACE_SYNC:
381 if (ib->gfx_level >= GFX7) {
382 ac_dump_reg(f, ib->gfx_level, ib->family, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
383 ac_dump_reg(f, ib->gfx_level, ib->family, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
384 ac_dump_reg(f, ib->gfx_level, ib->family, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
385 } else {
386 ac_dump_reg(f, ib->gfx_level, ib->family, R_0085F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
387 ac_dump_reg(f, ib->gfx_level, ib->family, R_0085F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
388 ac_dump_reg(f, ib->gfx_level, ib->family, R_0085F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
389 }
390 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
391 break;
392 case PKT3_EVENT_WRITE: {
393 uint32_t event_dw = ac_ib_get(ib);
394 ac_dump_reg(f, ib->gfx_level, ib->family, R_028A90_VGT_EVENT_INITIATOR, event_dw,
395 S_028A90_EVENT_TYPE(~0));
396 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
397 print_named_value(f, "INV_L2", (event_dw >> 20) & 0x1, 1);
398 if (count > 0)
399 print_addr(ib, "ADDR", ac_ib_get64(ib), 0);
400
401 break;
402 }
403 case PKT3_EVENT_WRITE_EOP: {
404 uint32_t event_dw = ac_ib_get(ib);
405 ac_dump_reg(f, ib->gfx_level, ib->family, R_028A90_VGT_EVENT_INITIATOR, event_dw,
406 S_028A90_EVENT_TYPE(~0));
407 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
408 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
409 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
410 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
411 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
412 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
413 uint64_t addr = ac_ib_get64(ib);
414 uint32_t data_sel = addr >> 61;
415 uint32_t data_size;
416 switch (data_sel) {
417 case EOP_DATA_SEL_VALUE_32BIT:
418 data_size = 4;
419 break;
420 case EOP_DATA_SEL_VALUE_64BIT:
421 case EOP_DATA_SEL_TIMESTAMP:
422 data_size = 8;
423 break;
424 default:
425 data_size = AC_ADDR_SIZE_NOT_MEMORY;
426 break;
427 }
428 print_addr(ib, "ADDR", ac_sext_addr48(addr), data_size);
429 print_named_value(f, "DST_SEL", (addr >> 48) & 0x3, 2);
430 print_named_value(f, "INT_SEL", (addr >> 56) & 0x7, 3);
431 print_named_value(f, "DATA_SEL", data_sel, 3);
432 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
433 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
434 break;
435 }
436 case PKT3_RELEASE_MEM: {
437 uint32_t event_dw = ac_ib_get(ib);
438 if (ib->gfx_level >= GFX10) {
439 ac_dump_reg(f, ib->gfx_level, ib->family, R_490_RELEASE_MEM_OP, event_dw, ~0u);
440 } else {
441 ac_dump_reg(f, ib->gfx_level, ib->family, R_028A90_VGT_EVENT_INITIATOR, event_dw,
442 S_028A90_EVENT_TYPE(~0));
443 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
444 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
445 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
446 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
447 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
448 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
449 print_named_value(f, "TC_NC_ACTION_ENA", (event_dw >> 19) & 0x1, 1);
450 print_named_value(f, "TC_WC_ACTION_ENA", (event_dw >> 20) & 0x1, 1);
451 print_named_value(f, "TC_MD_ACTION_ENA", (event_dw >> 21) & 0x1, 1);
452 }
453 uint32_t sel_dw = ac_ib_get(ib);
454 print_named_value(f, "DST_SEL", (sel_dw >> 16) & 0x3, 2);
455 print_named_value(f, "INT_SEL", (sel_dw >> 24) & 0x7, 3);
456 print_named_value(f, "DATA_SEL", sel_dw >> 29, 3);
457 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
458 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
459 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
460 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
461 print_named_value(f, "CTXID", ac_ib_get(ib), 32);
462 break;
463 }
464 case PKT3_WAIT_REG_MEM:
465 print_named_value(f, "OP", ac_ib_get(ib), 32);
466 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
467 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
468 print_named_value(f, "REF", ac_ib_get(ib), 32);
469 print_named_value(f, "MASK", ac_ib_get(ib), 32);
470 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
471 break;
472 case PKT3_DRAW_INDEX_AUTO:
473 ac_dump_reg(f, ib->gfx_level, ib->family, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
474 ac_dump_reg(f, ib->gfx_level, ib->family, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
475 break;
476 case PKT3_DRAW_INDEX_2:
477 ac_dump_reg(f, ib->gfx_level, ib->family, R_028A78_VGT_DMA_MAX_SIZE, ac_ib_get(ib), ~0);
478 print_addr(ib, "INDEX_ADDR", ac_ib_get64(ib), 0);
479 ac_dump_reg(f, ib->gfx_level, ib->family, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
480 ac_dump_reg(f, ib->gfx_level, ib->family, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
481 break;
482 case PKT3_DRAW_INDIRECT:
483 case PKT3_DRAW_INDEX_INDIRECT:
484 print_named_value(f, "OFFSET", ac_ib_get(ib), 32);
485 print_named_value(f, "VERTEX_OFFSET_REG", ac_ib_get(ib), 32);
486 print_named_value(f, "START_INSTANCE_REG", ac_ib_get(ib), 32);
487 ac_dump_reg(f, ib->gfx_level, ib->family, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
488 break;
489 case PKT3_DRAW_INDIRECT_MULTI:
490 case PKT3_DRAW_INDEX_INDIRECT_MULTI:
491 print_named_value(f, "OFFSET", ac_ib_get(ib), 32);
492 print_named_value(f, "VERTEX_OFFSET_REG", ac_ib_get(ib), 32);
493 print_named_value(f, "START_INSTANCE_REG", ac_ib_get(ib), 32);
494 tmp = ac_ib_get(ib);
495 print_named_value(f, "DRAW_ID_REG", tmp & 0xFFFF, 16);
496 print_named_value(f, "DRAW_ID_ENABLE", tmp >> 31, 1);
497 print_named_value(f, "COUNT_INDIRECT_ENABLE", (tmp >> 30) & 1, 1);
498 print_named_value(f, "DRAW_COUNT", ac_ib_get(ib), 32);
499 print_addr(ib, "COUNT_ADDR", ac_ib_get64(ib), 0);
500 print_named_value(f, "STRIDE", ac_ib_get(ib), 32);
501 ac_dump_reg(f, ib->gfx_level, ib->family, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
502 break;
503 case PKT3_INDEX_BASE:
504 print_addr(ib, "ADDR", ac_ib_get64(ib), 0);
505 break;
506 case PKT3_INDEX_TYPE:
507 ac_dump_reg(f, ib->gfx_level, ib->family, R_028A7C_VGT_DMA_INDEX_TYPE, ac_ib_get(ib), ~0);
508 break;
509 case PKT3_NUM_INSTANCES:
510 ac_dump_reg(f, ib->gfx_level, ib->family, R_030934_VGT_NUM_INSTANCES, ac_ib_get(ib), ~0);
511 break;
512 case PKT3_WRITE_DATA: {
513 uint32_t control = ac_ib_get(ib);
514 ac_dump_reg(f, ib->gfx_level, ib->family, R_370_CONTROL, control, ~0);
515 uint32_t dst_sel = G_370_DST_SEL(control);
516 uint64_t addr = ac_ib_get64(ib);
517 uint32_t dword_count = first_dw + count + 1 - ib->cur_dw;
518 bool writes_memory = dst_sel == V_370_MEM_GRBM || dst_sel == V_370_TC_L2 || dst_sel == V_370_MEM;
519 print_addr(ib, "DST_ADDR", addr, writes_memory ? dword_count * 4 : AC_ADDR_SIZE_NOT_MEMORY);
520 for (uint32_t i = 0; i < dword_count; i++)
521 print_data_dword(f, ac_ib_get(ib), "data");
522 break;
523 }
524 case PKT3_CP_DMA:
525 ac_dump_reg(f, ib->gfx_level, ib->family, R_410_CP_DMA_WORD0, ac_ib_get(ib), ~0);
526 ac_dump_reg(f, ib->gfx_level, ib->family, R_411_CP_DMA_WORD1, ac_ib_get(ib), ~0);
527 ac_dump_reg(f, ib->gfx_level, ib->family, R_412_CP_DMA_WORD2, ac_ib_get(ib), ~0);
528 ac_dump_reg(f, ib->gfx_level, ib->family, R_413_CP_DMA_WORD3, ac_ib_get(ib), ~0);
529 ac_dump_reg(f, ib->gfx_level, ib->family, R_415_COMMAND, ac_ib_get(ib), ~0);
530 break;
531 case PKT3_DMA_DATA: {
532 uint32_t header = ac_ib_get(ib);
533 ac_dump_reg(f, ib->gfx_level, ib->family, R_501_DMA_DATA_WORD0, header, ~0);
534
535 uint64_t src_addr = ac_ib_get64(ib);
536 uint64_t dst_addr = ac_ib_get64(ib);
537
538 uint32_t command = ac_ib_get(ib);
539 uint32_t size = ib->gfx_level >= GFX9 ? G_415_BYTE_COUNT_GFX9(command)
540 : G_415_BYTE_COUNT_GFX6(command);
541
542 uint32_t src_sel = G_501_SRC_SEL(header);
543 bool src_mem = (src_sel == V_501_SRC_ADDR && G_415_SAS(command) == V_415_MEMORY) ||
544 src_sel == V_411_SRC_ADDR_TC_L2;
545
546 uint32_t dst_sel = G_501_DST_SEL(header);
547 bool dst_mem = (dst_sel == V_501_DST_ADDR && G_415_DAS(command) == V_415_MEMORY) ||
548 dst_sel == V_411_DST_ADDR_TC_L2;
549
550 print_addr(ib, "SRC_ADDR", src_addr, src_mem ? size : AC_ADDR_SIZE_NOT_MEMORY);
551 print_addr(ib, "DST_ADDR", dst_addr, dst_mem ? size : AC_ADDR_SIZE_NOT_MEMORY);
552 ac_dump_reg(f, ib->gfx_level, ib->family, R_415_COMMAND, command, ~0);
553 break;
554 }
555 case PKT3_INDIRECT_BUFFER_SI:
556 case PKT3_INDIRECT_BUFFER_CONST:
557 case PKT3_INDIRECT_BUFFER: {
558 uint32_t base_lo_dw = ac_ib_get(ib);
559 ac_dump_reg(f, ib->gfx_level, ib->family, R_3F0_IB_BASE_LO, base_lo_dw, ~0);
560 uint32_t base_hi_dw = ac_ib_get(ib);
561 ac_dump_reg(f, ib->gfx_level, ib->family, R_3F1_IB_BASE_HI, base_hi_dw, ~0);
562 uint32_t control_dw = ac_ib_get(ib);
563 ac_dump_reg(f, ib->gfx_level, ib->family, R_3F2_IB_CONTROL, control_dw, ~0);
564
565 if (!ib->addr_callback)
566 break;
567
568 uint64_t addr = ((uint64_t)base_hi_dw << 32) | base_lo_dw;
569 struct ac_addr_info addr_info;
570 ib->addr_callback(ib->addr_callback_data, addr, &addr_info);
571 void *data = addr_info.cpu_addr;
572 if (!data)
573 break;
574
575 if (G_3F2_CHAIN(control_dw)) {
576 ib->ib = data;
577 ib->num_dw = G_3F2_IB_SIZE(control_dw);
578 ib->cur_dw = 0;
579 return;
580 }
581
582 struct ac_ib_parser ib_recurse;
583 memcpy(&ib_recurse, ib, sizeof(ib_recurse));
584 ib_recurse.ib = data;
585 ib_recurse.num_dw = G_3F2_IB_SIZE(control_dw);
586 ib_recurse.cur_dw = 0;
587 if (ib_recurse.trace_id_count) {
588 if (*current_trace_id == *ib->trace_ids) {
589 ++ib_recurse.trace_ids;
590 --ib_recurse.trace_id_count;
591 } else {
592 ib_recurse.trace_id_count = 0;
593 }
594 }
595
596 fprintf(f, "\n\035>------------------ nested begin ------------------\n");
597 parse_gfx_compute_ib(f, &ib_recurse);
598 fprintf(f, "\n\035<------------------- nested end -------------------\n");
599 break;
600 }
601 case PKT3_CLEAR_STATE:
602 case PKT3_INCREMENT_DE_COUNTER:
603 case PKT3_PFP_SYNC_ME:
604 print_data_dword(f, ac_ib_get(ib), "reserved");
605 break;
606 case PKT3_NOP:
607 if (header == PKT3_NOP_PAD) {
608 count = -1; /* One dword NOP. */
609 } else if (count == 0 && ib->cur_dw < ib->num_dw && AC_IS_TRACE_POINT(ib->ib[ib->cur_dw])) {
610 unsigned packet_id = AC_GET_TRACE_POINT_ID(ib->ib[ib->cur_dw]);
611
612 print_spaces(f, INDENT_PKT);
613 fprintf(f, "%sTrace point ID: %u%s\n", O_COLOR_RED, packet_id, O_COLOR_RESET);
614
615 if (!ib->trace_id_count)
616 break; /* tracing was disabled */
617
618 *current_trace_id = packet_id;
619
620 print_spaces(f, INDENT_PKT);
621 if (packet_id < *ib->trace_ids) {
622 fprintf(f, "%sThis trace point was reached by the CP.%s\n",
623 O_COLOR_RED, O_COLOR_RESET);
624 } else if (packet_id == *ib->trace_ids) {
625 fprintf(f, "%s!!!!! This is the last trace point that "
626 "was reached by the CP !!!!!%s\n",
627 O_COLOR_RED, O_COLOR_RESET);
628 } else if (packet_id + 1 == *ib->trace_ids) {
629 fprintf(f, "%s!!!!! This is the first trace point that "
630 "was NOT been reached by the CP !!!!!%s\n",
631 O_COLOR_RED, O_COLOR_RESET);
632 } else {
633 fprintf(f, "%s!!!!! This trace point was NOT reached "
634 "by the CP !!!!!%s\n",
635 O_COLOR_RED, O_COLOR_RESET);
636 }
637 } else {
638 while (ib->cur_dw <= first_dw + count)
639 print_data_dword(f, ac_ib_get(ib), "unused");
640 }
641 break;
642 case PKT3_DISPATCH_DIRECT:
643 ac_dump_reg(f, ib->gfx_level, ib->family, R_00B804_COMPUTE_DIM_X, ac_ib_get(ib), ~0);
644 ac_dump_reg(f, ib->gfx_level, ib->family, R_00B808_COMPUTE_DIM_Y, ac_ib_get(ib), ~0);
645 ac_dump_reg(f, ib->gfx_level, ib->family, R_00B80C_COMPUTE_DIM_Z, ac_ib_get(ib), ~0);
646 ac_dump_reg(f, ib->gfx_level, ib->family, R_00B800_COMPUTE_DISPATCH_INITIATOR,
647 ac_ib_get(ib), ~0);
648 break;
649 case PKT3_DISPATCH_INDIRECT:
650 if (count > 1)
651 print_addr(ib, "ADDR", ac_ib_get64(ib), 12);
652 else
653 print_named_value(f, "DATA_OFFSET", ac_ib_get(ib), 32);
654
655 ac_dump_reg(f, ib->gfx_level, ib->family, R_00B800_COMPUTE_DISPATCH_INITIATOR,
656 ac_ib_get(ib), ~0);
657 break;
658 case PKT3_SET_BASE:
659 tmp = ac_ib_get(ib);
660 print_string_value(f, "BASE_INDEX", tmp == 1 ? "INDIRECT_BASE" : COLOR_RED "UNKNOWN" COLOR_RESET);
661 print_addr(ib, "ADDR", ac_ib_get64(ib), 0);
662 break;
663 case PKT3_PRIME_UTCL2:
664 tmp = ac_ib_get(ib);
665 print_named_value(f, "CACHE_PERM[rwx]", tmp & 0x7, 3);
666 print_string_value(f, "PRIME_MODE", tmp & 0x8 ? "WAIT_FOR_XACK" : "DONT_WAIT_FOR_XACK");
667 print_named_value(f, "ENGINE_SEL", tmp >> 30, 2);
668 print_addr(ib, "ADDR", ac_ib_get64(ib), 0);
669 print_named_value(f, "REQUESTED_PAGES", ac_ib_get(ib), 14);
670 break;
671 case PKT3_ATOMIC_MEM:
672 tmp = ac_ib_get(ib);
673 print_named_value(f, "ATOMIC", tmp & 0x7f, 7);
674 print_named_value(f, "COMMAND", (tmp >> 8) & 0xf, 4);
675 print_named_value(f, "CACHE_POLICY", (tmp >> 25) & 0x3, 2);
676 print_named_value(f, "ENGINE_SEL", tmp >> 30, 2);
677 print_addr(ib, "ADDR", ac_ib_get64(ib), 8);
678 print_named_value(f, "SRC_DATA_LO", ac_ib_get(ib), 32);
679 print_named_value(f, "SRC_DATA_HI", ac_ib_get(ib), 32);
680 print_named_value(f, "CMP_DATA_LO", ac_ib_get(ib), 32);
681 print_named_value(f, "CMP_DATA_HI", ac_ib_get(ib), 32);
682 print_named_value(f, "LOOP_INTERVAL", ac_ib_get(ib) & 0x1fff, 13);
683 break;
684 case PKT3_INDEX_BUFFER_SIZE:
685 print_named_value(f, "COUNT", ac_ib_get(ib), 32);
686 break;
687 case PKT3_COND_EXEC: {
688 uint32_t size = ac_ib_get(ib) * 4;
689 print_addr(ib, "ADDR", ac_ib_get64(ib), size);
690 print_named_value(f, "SIZE", size, 32);
691 break;
692 }
693 }
694
695 /* print additional dwords */
696 while (ib->cur_dw <= first_dw + count)
697 ac_ib_get(ib);
698
699 if (ib->cur_dw > first_dw + count + 1)
700 fprintf(f, "%s !!!!! count in header too low !!!!!%s\n",
701 O_COLOR_RED, O_COLOR_RESET);
702 }
703
704 /**
705 * Parse and print an IB into a file.
706 */
parse_gfx_compute_ib(FILE * f,struct ac_ib_parser * ib)707 static void parse_gfx_compute_ib(FILE *f, struct ac_ib_parser *ib)
708 {
709 int current_trace_id = -1;
710
711 while (ib->cur_dw < ib->num_dw) {
712 uint32_t header = ac_ib_get(ib);
713 unsigned type = PKT_TYPE_G(header);
714
715 switch (type) {
716 case 3:
717 ac_parse_packet3(f, header, ib, ¤t_trace_id);
718 break;
719 case 2:
720 /* type-2 nop */
721 if (header == 0x80000000) {
722 fprintf(f, "%sNOP (type 2)%s\n",
723 O_COLOR_GREEN, O_COLOR_RESET);
724 break;
725 }
726 FALLTHROUGH;
727 default:
728 fprintf(f, "Unknown packet type %i\n", type);
729 break;
730 }
731 }
732 }
733
format_ib_output(FILE * f,char * out)734 static void format_ib_output(FILE *f, char *out)
735 {
736 unsigned depth = 0;
737
738 for (;;) {
739 char op = 0;
740
741 if (out[0] == '\n' && out[1] == '\035')
742 out++;
743 if (out[0] == '\035') {
744 op = out[1];
745 out += 2;
746 }
747
748 if (op == '<')
749 depth--;
750
751 unsigned indent = 4 * depth;
752 if (op != '#')
753 indent += 9;
754
755 if (indent)
756 print_spaces(f, indent);
757
758 char *end = strchrnul(out, '\n');
759 fwrite(out, end - out, 1, f);
760 fputc('\n', f); /* always end with a new line */
761 if (!*end)
762 break;
763
764 out = end + 1;
765
766 if (op == '>')
767 depth++;
768 }
769 }
770
parse_sdma_ib(FILE * f,struct ac_ib_parser * ib)771 static void parse_sdma_ib(FILE *f, struct ac_ib_parser *ib)
772 {
773 while (ib->cur_dw < ib->num_dw) {
774 const uint32_t header = ac_ib_get(ib);
775 const uint32_t opcode = header & 0xff;
776 const uint32_t sub_op = (header >> 8) & 0xff;
777
778 switch (opcode) {
779 case SDMA_OPCODE_NOP: {
780 fprintf(f, "NOP\n");
781
782 const uint32_t count = header >> 16;
783 for (unsigned i = 0; i < count; ++i) {
784 ac_ib_get(ib);
785 fprintf(f, "\n");
786 }
787 break;
788 }
789 case SDMA_OPCODE_CONSTANT_FILL: {
790 fprintf(f, "CONSTANT_FILL\n");
791 ac_ib_get(ib);
792 fprintf(f, "\n");
793 ac_ib_get(ib);
794 fprintf(f, "\n");
795 uint32_t value = ac_ib_get(ib);
796 fprintf(f, " fill value = %u\n", value);
797 uint32_t byte_count = ac_ib_get(ib) + 1;
798 fprintf(f, " fill byte count = %u\n", byte_count);
799
800 unsigned dwords = byte_count / 4;
801 for (unsigned i = 0; i < dwords; ++i) {
802 ac_ib_get(ib);
803 fprintf(f, "\n");
804 }
805
806 break;
807 }
808 case SDMA_OPCODE_WRITE: {
809 fprintf(f, "WRITE\n");
810
811 /* VA */
812 ac_ib_get(ib);
813 fprintf(f, "\n");
814 ac_ib_get(ib);
815 fprintf(f, "\n");
816
817 uint32_t dwords = ac_ib_get(ib) + 1;
818 fprintf(f, " written dword count = %u\n", dwords);
819
820 for (unsigned i = 0; i < dwords; ++i) {
821 ac_ib_get(ib);
822 fprintf(f, "\n");
823 }
824
825 break;
826 }
827 case SDMA_OPCODE_COPY: {
828 switch (sub_op) {
829 case SDMA_COPY_SUB_OPCODE_LINEAR: {
830 fprintf(f, "COPY LINEAR\n");
831
832 uint32_t copy_bytes = ac_ib_get(ib) + (ib->gfx_level >= GFX9 ? 1 : 0);
833 fprintf(f, " copy bytes: %u\n", copy_bytes);
834 ac_ib_get(ib);
835 fprintf(f, "\n");
836 ac_ib_get(ib);
837 fprintf(f, " src VA low\n");
838 ac_ib_get(ib);
839 fprintf(f, " src VA high\n");
840 ac_ib_get(ib);
841 fprintf(f, " dst VA low\n");
842 ac_ib_get(ib);
843 fprintf(f, " dst VA high\n");
844
845 break;
846 }
847 case SDMA_COPY_SUB_OPCODE_LINEAR_SUB_WINDOW: {
848 fprintf(f, "COPY LINEAR_SUB_WINDOW\n");
849
850 for (unsigned i = 0; i < 12; ++i) {
851 ac_ib_get(ib);
852 fprintf(f, "\n");
853 }
854 break;
855 }
856 case SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW: {
857 fprintf(f, "COPY TILED_SUB_WINDOW %s\n", header >> 31 ? "t2l" : "l2t");
858 uint32_t dcc = (header >> 19) & 1;
859
860 /* Tiled VA */
861 ac_ib_get(ib);
862 fprintf(f, " tiled VA low\n");
863 ac_ib_get(ib);
864 fprintf(f, " tiled VA high\n");
865
866 uint32_t dw3 = ac_ib_get(ib);
867 fprintf(f, " tiled offset x = %u, y=%u\n", dw3 & 0xffff, dw3 >> 16);
868 uint32_t dw4 = ac_ib_get(ib);
869 fprintf(f, " tiled offset z = %u, tiled width = %u\n", dw4 & 0xffff, (dw4 >> 16) + 1);
870 uint32_t dw5 = ac_ib_get(ib);
871 fprintf(f, " tiled height = %u, tiled depth = %u\n", (dw5 & 0xffff) + 1, (dw5 >> 16) + 1);
872
873 /* Tiled image info */
874 ac_ib_get(ib);
875 fprintf(f, " (tiled image info)\n");
876
877 /* Linear VA */
878 ac_ib_get(ib);
879 fprintf(f, " linear VA low\n");
880 ac_ib_get(ib);
881 fprintf(f, " linear VA high\n");
882
883 uint32_t dw9 = ac_ib_get(ib);
884 fprintf(f, " linear offset x = %u, y=%u\n", dw9 & 0xffff, dw9 >> 16);
885 uint32_t dw10 = ac_ib_get(ib);
886 fprintf(f, " linear offset z = %u, linear pitch = %u\n", dw10 & 0xffff, (dw10 >> 16) + 1);
887 uint32_t dw11 = ac_ib_get(ib);
888 fprintf(f, " linear slice pitch = %u\n", dw11 + 1);
889 uint32_t dw12 = ac_ib_get(ib);
890 fprintf(f, " copy width = %u, copy height = %u\n", (dw12 & 0xffff) + 1, (dw12 >> 16) + 1);
891 uint32_t dw13 = ac_ib_get(ib);
892 fprintf(f, " copy depth = %u\n", dw13 + 1);
893
894 if (dcc) {
895 ac_ib_get(ib);
896 fprintf(f, " metadata VA low\n");
897 ac_ib_get(ib);
898 fprintf(f, " metadata VA high\n");
899 ac_ib_get(ib);
900 fprintf(f, " (metadata config)\n");
901 }
902 break;
903 }
904 case SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW: {
905 fprintf(f, "COPY T2T_SUB_WINDOW\n");
906 uint32_t dcc = (header >> 19) & 1;
907
908 for (unsigned i = 0; i < 14; ++i) {
909 ac_ib_get(ib);
910 fprintf(f, "\n");
911 }
912
913 if (dcc) {
914 ac_ib_get(ib);
915 fprintf(f, " metadata VA low\n");
916 ac_ib_get(ib);
917 fprintf(f, " metadata VA high\n");
918 ac_ib_get(ib);
919 fprintf(f, " (metadata config)\n");
920 }
921 break;
922 }
923 default:
924 fprintf(f, "(unrecognized COPY sub op)\n");
925 break;
926 }
927 break;
928 }
929 default:
930 fprintf(f, " (unrecognized opcode)\n");
931 break;
932 }
933 }
934 }
935
936 /**
937 * Parse and print an IB into a file.
938 *
939 * \param f file
940 * \param ib_ptr IB
941 * \param num_dw size of the IB
942 * \param gfx_level gfx level
943 * \param family chip family
944 * \param ip_type IP type
945 * \param trace_ids the last trace IDs that are known to have been reached
946 * and executed by the CP, typically read from a buffer
947 * \param trace_id_count The number of entries in the trace_ids array.
948 * \param addr_callback Get a mapped pointer of the IB at a given address. Can
949 * be NULL.
950 * \param addr_callback_data user data for addr_callback
951 */
ac_parse_ib_chunk(FILE * f,uint32_t * ib_ptr,int num_dw,const int * trace_ids,unsigned trace_id_count,enum amd_gfx_level gfx_level,enum radeon_family family,enum amd_ip_type ip_type,ac_debug_addr_callback addr_callback,void * addr_callback_data)952 void ac_parse_ib_chunk(FILE *f, uint32_t *ib_ptr, int num_dw, const int *trace_ids,
953 unsigned trace_id_count, enum amd_gfx_level gfx_level,
954 enum radeon_family family, enum amd_ip_type ip_type,
955 ac_debug_addr_callback addr_callback, void *addr_callback_data)
956 {
957 struct ac_ib_parser ib = {0};
958 ib.ib = ib_ptr;
959 ib.num_dw = num_dw;
960 ib.trace_ids = trace_ids;
961 ib.trace_id_count = trace_id_count;
962 ib.gfx_level = gfx_level;
963 ib.family = family;
964 ib.addr_callback = addr_callback;
965 ib.addr_callback_data = addr_callback_data;
966
967 char *out;
968 size_t outsize;
969 struct u_memstream mem;
970 u_memstream_open(&mem, &out, &outsize);
971 FILE *const memf = u_memstream_get(&mem);
972 ib.f = memf;
973
974 if (ip_type == AMD_IP_GFX || ip_type == AMD_IP_COMPUTE)
975 parse_gfx_compute_ib(memf, &ib);
976 else if (ip_type == AMD_IP_SDMA)
977 parse_sdma_ib(memf, &ib);
978 else
979 unreachable("unsupported IP type");
980
981 u_memstream_close(&mem);
982
983 if (out) {
984 format_ib_output(f, out);
985 free(out);
986 }
987
988 if (ib.cur_dw > ib.num_dw) {
989 printf("\nPacket ends after the end of IB.\n");
990 exit(1);
991 }
992 }
993
ip_name(const enum amd_ip_type ip)994 static const char *ip_name(const enum amd_ip_type ip)
995 {
996 switch (ip) {
997 case AMD_IP_GFX:
998 return "GFX";
999 case AMD_IP_COMPUTE:
1000 return "COMPUTE";
1001 case AMD_IP_SDMA:
1002 return "SDMA";
1003 default:
1004 return "Unknown";
1005 }
1006 }
1007
1008 /**
1009 * Parse and print an IB into a file.
1010 *
1011 * \param f file
1012 * \param ib IB
1013 * \param num_dw size of the IB
1014 * \param gfx_level gfx level
1015 * \param family chip family
1016 * \param ip_type IP type
1017 * \param trace_ids the last trace IDs that are known to have been reached
1018 * and executed by the CP, typically read from a buffer
1019 * \param trace_id_count The number of entries in the trace_ids array.
1020 * \param addr_callback Get a mapped pointer of the IB at a given address. Can
1021 * be NULL.
1022 * \param addr_callback_data user data for addr_callback
1023 */
ac_parse_ib(FILE * f,uint32_t * ib,int num_dw,const int * trace_ids,unsigned trace_id_count,const char * name,enum amd_gfx_level gfx_level,enum radeon_family family,enum amd_ip_type ip_type,ac_debug_addr_callback addr_callback,void * addr_callback_data)1024 void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids, unsigned trace_id_count,
1025 const char *name, enum amd_gfx_level gfx_level, enum radeon_family family,
1026 enum amd_ip_type ip_type, ac_debug_addr_callback addr_callback, void *addr_callback_data)
1027 {
1028 fprintf(f, "------------------ %s begin - %s ------------------\n", name, ip_name(ip_type));
1029
1030 ac_parse_ib_chunk(f, ib, num_dw, trace_ids, trace_id_count, gfx_level, family, ip_type,
1031 addr_callback, addr_callback_data);
1032
1033 fprintf(f, "------------------- %s end - %s -------------------\n\n", name, ip_name(ip_type));
1034 }
1035