1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. 5 * SPDX-License-Identifier: MIT 6 * 7 ***********************************************************************************************************************/ 8 9 /** 10 **************************************************************************************************** 11 * @file addrtypes.h 12 * @brief Contains the helper function and constants 13 **************************************************************************************************** 14 */ 15 #ifndef __ADDR_TYPES_H__ 16 #define __ADDR_TYPES_H__ 17 18 #if defined(__APPLE__) && !defined(HAVE_TSERVER) 19 // External definitions header maintained by Apple driver team, but not for diag team under Mac. 20 // Helps address compilation issues & reduces code covered by NDA 21 #include "addrExtDef.h" 22 23 #else 24 25 // Windows and/or Linux 26 #if !defined(VOID) 27 typedef void VOID; 28 #endif 29 30 #if !defined(FLOAT) 31 typedef float FLOAT; 32 #endif 33 34 #if !defined(DOUBLE) 35 typedef double DOUBLE; 36 #endif 37 38 #if !defined(CHAR) 39 typedef char CHAR; 40 #endif 41 42 #if !defined(INT) 43 typedef int INT; 44 #endif 45 46 #include <stdarg.h> // va_list...etc need this header 47 48 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER) 49 50 /** 51 **************************************************************************************************** 52 * Calling conventions 53 **************************************************************************************************** 54 */ 55 #ifndef ADDR_CDECL 56 #if defined(__GNUC__) 57 #if defined(__i386__) 58 #define ADDR_CDECL __attribute__((cdecl)) 59 #else 60 #define ADDR_CDECL 61 #endif 62 #else 63 #define ADDR_CDECL __cdecl 64 #endif 65 #endif 66 67 #ifndef ADDR_STDCALL 68 #if defined(__GNUC__) 69 #if defined(__i386__) 70 #define ADDR_STDCALL __attribute__((stdcall)) 71 #else 72 #define ADDR_STDCALL 73 #endif 74 #else 75 #define ADDR_STDCALL __stdcall 76 #endif 77 #endif 78 79 #ifndef ADDR_FASTCALL 80 #if defined(__GNUC__) 81 #if defined(__i386__) || defined(__amd64__) || defined(__x86_64__) 82 #define ADDR_FASTCALL __attribute__((regparm(0))) 83 #else 84 #define ADDR_FASTCALL 85 #endif 86 #else 87 #define ADDR_FASTCALL __fastcall 88 #endif 89 #endif 90 91 #ifndef GC_CDECL 92 #define GC_CDECL ADDR_CDECL 93 #endif 94 95 #ifndef GC_STDCALL 96 #define GC_STDCALL ADDR_STDCALL 97 #endif 98 99 #ifndef GC_FASTCALL 100 #define GC_FASTCALL ADDR_FASTCALL 101 #endif 102 103 104 #if defined(__GNUC__) 105 #define ADDR_INLINE static inline // inline needs to be static to link 106 #else 107 // win32, win64, other platforms 108 #define ADDR_INLINE __inline 109 #endif // #if defined(__GNUC__) 110 111 #define ADDR_API ADDR_FASTCALL //default call convention is fast call 112 113 /** 114 **************************************************************************************************** 115 * Global defines used by other modules 116 **************************************************************************************************** 117 */ 118 #if !defined(TILEINDEX_INVALID) 119 #define TILEINDEX_INVALID -1 120 #endif 121 122 #if !defined(TILEINDEX_LINEAR_GENERAL) 123 #define TILEINDEX_LINEAR_GENERAL -2 124 #endif 125 126 #if !defined(TILEINDEX_LINEAR_ALIGNED) 127 #define TILEINDEX_LINEAR_ALIGNED 8 128 #endif 129 130 /** 131 **************************************************************************************************** 132 * Return codes 133 **************************************************************************************************** 134 */ 135 typedef enum _ADDR_E_RETURNCODE 136 { 137 // General Return 138 ADDR_OK = 0, 139 ADDR_ERROR = 1, 140 141 // Specific Errors 142 ADDR_OUTOFMEMORY, 143 ADDR_INVALIDPARAMS, 144 ADDR_NOTSUPPORTED, 145 ADDR_NOTIMPLEMENTED, 146 ADDR_PARAMSIZEMISMATCH, 147 ADDR_INVALIDGBREGVALUES, 148 149 } ADDR_E_RETURNCODE; 150 151 /** 152 **************************************************************************************************** 153 * @brief 154 * Neutral enums that define tile modes for all H/W 155 * @note 156 * R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from 157 * ADDR_TM_2D_TILED_XTHICK 158 * 159 **************************************************************************************************** 160 */ 161 typedef enum _AddrTileMode 162 { 163 ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer 164 ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels 165 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles 166 ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles 167 ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles 168 ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4 169 ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16 170 ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles 171 ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap 172 ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4 173 ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16 174 ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles 175 ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices 176 ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick 177 ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap 178 ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick 179 ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI 180 ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI 181 ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI 182 ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size 183 ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only 184 ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only 185 ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size 186 ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only 187 ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only 188 ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib 189 ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode 190 } AddrTileMode; 191 192 /** 193 **************************************************************************************************** 194 * @brief 195 * Neutral enums that define swizzle modes for Gfx9+ ASIC 196 * @note 197 * 198 * ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource 199 * ADDR_SW_256B_* addressing block aligned size is 256B, for 2D resource 200 * ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resource 201 * ADDR_SW_64KB_* addressing block aligned size is 64KB, for 1D/2D/3D resource 202 * ADDR_SW_VAR_* addressing block aligned size is ASIC specific 203 * 204 * ADDR_SW_*_Z For GFX9: 205 - for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask 206 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode 207 For GFX10: 208 - represents Z-order swizzle mode for depth/stencil/FMask 209 * ADDR_SW_*_S For GFX9+: 210 - represents standard swizzle mode defined by MS 211 * ADDR_SW_*_D For GFX9: 212 - for 2D resource, represents a swizzle mode for displayable resource 213 * - for 3D resource, represents a swizzle mode which places each slice in order & pixel 214 For GFX10: 215 - for 2D resource, represents a swizzle mode for displayable resource 216 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode 217 within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible! 218 * ADDR_SW_*_R For GFX9: 219 - 2D resource only, represents a swizzle mode for rotated displayable resource 220 For GFX10: 221 - represents a swizzle mode for render target resource 222 * 223 **************************************************************************************************** 224 */ 225 typedef enum _AddrSwizzleMode 226 { 227 ADDR_SW_LINEAR = 0, 228 ADDR_SW_256B_S = 1, 229 ADDR_SW_256B_D = 2, 230 ADDR_SW_256B_R = 3, 231 ADDR_SW_4KB_Z = 4, 232 ADDR_SW_4KB_S = 5, 233 ADDR_SW_4KB_D = 6, 234 ADDR_SW_4KB_R = 7, 235 ADDR_SW_64KB_Z = 8, 236 ADDR_SW_64KB_S = 9, 237 ADDR_SW_64KB_D = 10, 238 ADDR_SW_64KB_R = 11, 239 ADDR_SW_MISCDEF12 = 12, 240 ADDR_SW_MISCDEF13 = 13, 241 ADDR_SW_MISCDEF14 = 14, 242 ADDR_SW_MISCDEF15 = 15, 243 ADDR_SW_64KB_Z_T = 16, 244 ADDR_SW_64KB_S_T = 17, 245 ADDR_SW_64KB_D_T = 18, 246 ADDR_SW_64KB_R_T = 19, 247 ADDR_SW_4KB_Z_X = 20, 248 ADDR_SW_4KB_S_X = 21, 249 ADDR_SW_4KB_D_X = 22, 250 ADDR_SW_4KB_R_X = 23, 251 ADDR_SW_64KB_Z_X = 24, 252 ADDR_SW_64KB_S_X = 25, 253 ADDR_SW_64KB_D_X = 26, 254 ADDR_SW_64KB_R_X = 27, 255 ADDR_SW_MISCDEF28 = 28, 256 ADDR_SW_MISCDEF29 = 29, 257 ADDR_SW_MISCDEF30 = 30, 258 ADDR_SW_MISCDEF31 = 31, 259 ADDR_SW_LINEAR_GENERAL = 32, 260 ADDR_SW_MAX_TYPE = 33, 261 262 ADDR_SW_RESERVED0 = ADDR_SW_MISCDEF12, 263 ADDR_SW_RESERVED1 = ADDR_SW_MISCDEF13, 264 ADDR_SW_RESERVED2 = ADDR_SW_MISCDEF14, 265 ADDR_SW_RESERVED3 = ADDR_SW_MISCDEF15, 266 ADDR_SW_RESERVED4 = ADDR_SW_MISCDEF29, 267 ADDR_SW_RESERVED5 = ADDR_SW_MISCDEF30, 268 269 ADDR_SW_VAR_Z_X = ADDR_SW_MISCDEF28, 270 ADDR_SW_VAR_R_X = ADDR_SW_MISCDEF31, 271 272 ADDR_SW_256KB_Z_X = ADDR_SW_MISCDEF28, 273 ADDR_SW_256KB_S_X = ADDR_SW_MISCDEF29, 274 ADDR_SW_256KB_D_X = ADDR_SW_MISCDEF30, 275 ADDR_SW_256KB_R_X = ADDR_SW_MISCDEF31, 276 } AddrSwizzleMode; 277 278 /** 279 **************************************************************************************************** 280 * @brief 281 * Neutral enums that define image type 282 * @note 283 * this is new for address library interface version 2 284 * 285 **************************************************************************************************** 286 */ 287 typedef enum _AddrResourceType 288 { 289 ADDR_RSRC_TEX_1D = 0, 290 ADDR_RSRC_TEX_2D = 1, 291 ADDR_RSRC_TEX_3D = 2, 292 ADDR_RSRC_MAX_TYPE = 3, 293 } AddrResourceType; 294 295 /** 296 **************************************************************************************************** 297 * @brief 298 * Neutral enums that define resource heap location 299 * @note 300 * this is new for address library interface version 2 301 * 302 **************************************************************************************************** 303 */ 304 typedef enum _AddrResrouceLocation 305 { 306 ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown 307 ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap 308 ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap 309 ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap 310 ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only 311 ADDR_RSRC_LOC_MAX_TYPE = 5, 312 } AddrResrouceLocation; 313 314 /** 315 **************************************************************************************************** 316 * @brief 317 * Neutral enums that define resource basic swizzle mode 318 * @note 319 * this is new for address library interface version 2 320 * 321 **************************************************************************************************** 322 */ 323 typedef enum _AddrSwType 324 { 325 ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder 326 ADDR_SW_S = 1, // Resource basic swizzle mode is Standard 327 ADDR_SW_D = 2, // Resource basic swizzle mode is Display 328 ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated/Render optimized 329 ADDR_SW_L = 4, // Resource basic swizzle mode is Linear 330 ADDR_SW_MAX_SWTYPE 331 } AddrSwType; 332 333 /** 334 **************************************************************************************************** 335 * @brief 336 * Neutral enums that define mipmap major mode 337 * @note 338 * this is new for address library interface version 2 339 * 340 **************************************************************************************************** 341 */ 342 typedef enum _AddrMajorMode 343 { 344 ADDR_MAJOR_X = 0, 345 ADDR_MAJOR_Y = 1, 346 ADDR_MAJOR_Z = 2, 347 ADDR_MAJOR_MAX_TYPE = 3, 348 } AddrMajorMode; 349 350 /** 351 **************************************************************************************************** 352 * AddrFormat 353 * 354 * @brief 355 * Neutral enum for SurfaceFormat 356 * 357 **************************************************************************************************** 358 */ 359 typedef enum _AddrFormat { 360 ADDR_FMT_INVALID = 0x00000000, 361 ADDR_FMT_8 = 0x00000001, 362 ADDR_FMT_4_4 = 0x00000002, 363 ADDR_FMT_3_3_2 = 0x00000003, 364 ADDR_FMT_RESERVED_4 = 0x00000004, 365 ADDR_FMT_16 = 0x00000005, 366 ADDR_FMT_16_FLOAT = ADDR_FMT_16, 367 ADDR_FMT_8_8 = 0x00000007, 368 ADDR_FMT_5_6_5 = 0x00000008, 369 ADDR_FMT_6_5_5 = 0x00000009, 370 ADDR_FMT_1_5_5_5 = 0x0000000a, 371 ADDR_FMT_4_4_4_4 = 0x0000000b, 372 ADDR_FMT_5_5_5_1 = 0x0000000c, 373 ADDR_FMT_32 = 0x0000000d, 374 ADDR_FMT_32_FLOAT = ADDR_FMT_32, 375 ADDR_FMT_16_16 = 0x0000000f, 376 ADDR_FMT_16_16_FLOAT = ADDR_FMT_16_16, 377 ADDR_FMT_8_24 = 0x00000011, 378 ADDR_FMT_8_24_FLOAT = ADDR_FMT_8_24, 379 ADDR_FMT_24_8 = 0x00000013, 380 ADDR_FMT_24_8_FLOAT = ADDR_FMT_24_8, 381 ADDR_FMT_10_11_11 = 0x00000015, 382 ADDR_FMT_10_11_11_FLOAT = ADDR_FMT_10_11_11, 383 ADDR_FMT_11_11_10 = 0x00000017, 384 ADDR_FMT_11_11_10_FLOAT = ADDR_FMT_11_11_10, 385 ADDR_FMT_2_10_10_10 = 0x00000019, 386 ADDR_FMT_8_8_8_8 = 0x0000001a, 387 ADDR_FMT_10_10_10_2 = 0x0000001b, 388 ADDR_FMT_X24_8_32_FLOAT = 0x0000001c, 389 ADDR_FMT_32_32 = 0x0000001d, 390 ADDR_FMT_32_32_FLOAT = ADDR_FMT_32_32, 391 ADDR_FMT_16_16_16_16 = 0x0000001f, 392 ADDR_FMT_16_16_16_16_FLOAT = ADDR_FMT_16_16_16_16, 393 ADDR_FMT_RESERVED_33 = 0x00000021, 394 ADDR_FMT_32_32_32_32 = 0x00000022, 395 ADDR_FMT_32_32_32_32_FLOAT = ADDR_FMT_32_32_32_32, 396 ADDR_FMT_RESERVED_36 = 0x00000024, 397 ADDR_FMT_1 = 0x00000025, 398 ADDR_FMT_1_REVERSED = 0x00000026, 399 ADDR_FMT_GB_GR = 0x00000027, 400 ADDR_FMT_BG_RG = 0x00000028, 401 ADDR_FMT_32_AS_8 = 0x00000029, 402 ADDR_FMT_32_AS_8_8 = 0x0000002a, 403 ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b, 404 ADDR_FMT_8_8_8 = 0x0000002c, 405 ADDR_FMT_16_16_16 = 0x0000002d, 406 ADDR_FMT_16_16_16_FLOAT = ADDR_FMT_16_16_16, 407 ADDR_FMT_32_32_32 = 0x0000002f, 408 ADDR_FMT_32_32_32_FLOAT = ADDR_FMT_32_32_32, 409 ADDR_FMT_BC1 = 0x00000031, 410 ADDR_FMT_BC2 = 0x00000032, 411 ADDR_FMT_BC3 = 0x00000033, 412 ADDR_FMT_BC4 = 0x00000034, 413 ADDR_FMT_BC5 = 0x00000035, 414 ADDR_FMT_BC6 = 0x00000036, 415 ADDR_FMT_BC7 = 0x00000037, 416 ADDR_FMT_32_AS_32_32_32_32 = 0x00000038, 417 ADDR_FMT_APC3 = 0x00000039, 418 ADDR_FMT_APC4 = 0x0000003a, 419 ADDR_FMT_APC5 = 0x0000003b, 420 ADDR_FMT_APC6 = 0x0000003c, 421 ADDR_FMT_APC7 = 0x0000003d, 422 ADDR_FMT_CTX1 = 0x0000003e, 423 ADDR_FMT_RESERVED_63 = 0x0000003f, 424 ADDR_FMT_ASTC_4x4 = 0x00000040, 425 ADDR_FMT_ASTC_5x4 = 0x00000041, 426 ADDR_FMT_ASTC_5x5 = 0x00000042, 427 ADDR_FMT_ASTC_6x5 = 0x00000043, 428 ADDR_FMT_ASTC_6x6 = 0x00000044, 429 ADDR_FMT_ASTC_8x5 = 0x00000045, 430 ADDR_FMT_ASTC_8x6 = 0x00000046, 431 ADDR_FMT_ASTC_8x8 = 0x00000047, 432 ADDR_FMT_ASTC_10x5 = 0x00000048, 433 ADDR_FMT_ASTC_10x6 = 0x00000049, 434 ADDR_FMT_ASTC_10x8 = 0x0000004a, 435 ADDR_FMT_ASTC_10x10 = 0x0000004b, 436 ADDR_FMT_ASTC_12x10 = 0x0000004c, 437 ADDR_FMT_ASTC_12x12 = 0x0000004d, 438 ADDR_FMT_ETC2_64BPP = 0x0000004e, 439 ADDR_FMT_ETC2_128BPP = 0x0000004f, 440 ADDR_FMT_BG_RG_16_16_16_16 = 0x00000050, 441 } AddrFormat; 442 443 /** 444 **************************************************************************************************** 445 * AddrDepthFormat 446 * 447 * @brief 448 * Neutral enum for addrFlt32ToDepthPixel 449 * 450 **************************************************************************************************** 451 */ 452 typedef enum _AddrDepthFormat 453 { 454 ADDR_DEPTH_INVALID = 0x00000000, 455 ADDR_DEPTH_16 = 0x00000001, 456 ADDR_DEPTH_X8_24 = 0x00000002, 457 ADDR_DEPTH_8_24 = 0x00000003, 458 ADDR_DEPTH_X8_24_FLOAT = 0x00000004, 459 ADDR_DEPTH_8_24_FLOAT = 0x00000005, 460 ADDR_DEPTH_32_FLOAT = 0x00000006, 461 ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007, 462 463 } AddrDepthFormat; 464 465 /** 466 **************************************************************************************************** 467 * AddrColorFormat 468 * 469 * @brief 470 * Neutral enum for ColorFormat 471 * 472 **************************************************************************************************** 473 */ 474 typedef enum _AddrColorFormat 475 { 476 ADDR_COLOR_INVALID = 0x00000000, 477 ADDR_COLOR_8 = 0x00000001, 478 ADDR_COLOR_4_4 = 0x00000002, 479 ADDR_COLOR_3_3_2 = 0x00000003, 480 ADDR_COLOR_RESERVED_4 = 0x00000004, 481 ADDR_COLOR_16 = 0x00000005, 482 ADDR_COLOR_16_FLOAT = 0x00000006, 483 ADDR_COLOR_8_8 = 0x00000007, 484 ADDR_COLOR_5_6_5 = 0x00000008, 485 ADDR_COLOR_6_5_5 = 0x00000009, 486 ADDR_COLOR_1_5_5_5 = 0x0000000a, 487 ADDR_COLOR_4_4_4_4 = 0x0000000b, 488 ADDR_COLOR_5_5_5_1 = 0x0000000c, 489 ADDR_COLOR_32 = 0x0000000d, 490 ADDR_COLOR_32_FLOAT = 0x0000000e, 491 ADDR_COLOR_16_16 = 0x0000000f, 492 ADDR_COLOR_16_16_FLOAT = 0x00000010, 493 ADDR_COLOR_8_24 = 0x00000011, 494 ADDR_COLOR_8_24_FLOAT = 0x00000012, 495 ADDR_COLOR_24_8 = 0x00000013, 496 ADDR_COLOR_24_8_FLOAT = 0x00000014, 497 ADDR_COLOR_10_11_11 = 0x00000015, 498 ADDR_COLOR_10_11_11_FLOAT = 0x00000016, 499 ADDR_COLOR_11_11_10 = 0x00000017, 500 ADDR_COLOR_11_11_10_FLOAT = 0x00000018, 501 ADDR_COLOR_2_10_10_10 = 0x00000019, 502 ADDR_COLOR_8_8_8_8 = 0x0000001a, 503 ADDR_COLOR_10_10_10_2 = 0x0000001b, 504 ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c, 505 ADDR_COLOR_32_32 = 0x0000001d, 506 ADDR_COLOR_32_32_FLOAT = 0x0000001e, 507 ADDR_COLOR_16_16_16_16 = 0x0000001f, 508 ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020, 509 ADDR_COLOR_RESERVED_33 = 0x00000021, 510 ADDR_COLOR_32_32_32_32 = 0x00000022, 511 ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023, 512 } AddrColorFormat; 513 514 /** 515 **************************************************************************************************** 516 * AddrSurfaceNumber 517 * 518 * @brief 519 * Neutral enum for SurfaceNumber 520 * 521 **************************************************************************************************** 522 */ 523 typedef enum _AddrSurfaceNumber { 524 ADDR_NUMBER_UNORM = 0x00000000, 525 ADDR_NUMBER_SNORM = 0x00000001, 526 ADDR_NUMBER_USCALED = 0x00000002, 527 ADDR_NUMBER_SSCALED = 0x00000003, 528 ADDR_NUMBER_UINT = 0x00000004, 529 ADDR_NUMBER_SINT = 0x00000005, 530 ADDR_NUMBER_SRGB = 0x00000006, 531 ADDR_NUMBER_FLOAT = 0x00000007, 532 } AddrSurfaceNumber; 533 534 /** 535 **************************************************************************************************** 536 * AddrSurfaceSwap 537 * 538 * @brief 539 * Neutral enum for SurfaceSwap 540 * 541 **************************************************************************************************** 542 */ 543 typedef enum _AddrSurfaceSwap { 544 ADDR_SWAP_STD = 0x00000000, 545 ADDR_SWAP_ALT = 0x00000001, 546 ADDR_SWAP_STD_REV = 0x00000002, 547 ADDR_SWAP_ALT_REV = 0x00000003, 548 } AddrSurfaceSwap; 549 550 /** 551 **************************************************************************************************** 552 * AddrHtileBlockSize 553 * 554 * @brief 555 * Size of HTILE blocks, valid values are 4 or 8 for now 556 **************************************************************************************************** 557 */ 558 typedef enum _AddrHtileBlockSize 559 { 560 ADDR_HTILE_BLOCKSIZE_4 = 4, 561 ADDR_HTILE_BLOCKSIZE_8 = 8, 562 } AddrHtileBlockSize; 563 564 565 /** 566 **************************************************************************************************** 567 * AddrPipeCfg 568 * 569 * @brief 570 * The pipe configuration field specifies both the number of pipes and 571 * how pipes are interleaved on the surface. 572 * The expression of number of pipes, the shader engine tile size, and packer tile size 573 * is encoded in a PIPE_CONFIG register field. 574 * In general the number of pipes usually matches the number of memory channels of the 575 * hardware configuration. 576 * For hw configurations w/ non-pow2 memory number of memory channels, it usually matches 577 * the number of ROP units(? TODO: which registers??) 578 * The enum value = hw enum + 1 which is to reserve 0 for requesting default. 579 **************************************************************************************************** 580 */ 581 typedef enum _AddrPipeCfg 582 { 583 ADDR_PIPECFG_INVALID = 0, 584 ADDR_PIPECFG_P2 = 1, /// 2 pipes, 585 ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes, 586 ADDR_PIPECFG_P4_16x16 = 6, 587 ADDR_PIPECFG_P4_16x32 = 7, 588 ADDR_PIPECFG_P4_32x32 = 8, 589 ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes 590 ADDR_PIPECFG_P8_16x32_8x16 = 10, 591 ADDR_PIPECFG_P8_32x32_8x16 = 11, 592 ADDR_PIPECFG_P8_16x32_16x16 = 12, 593 ADDR_PIPECFG_P8_32x32_16x16 = 13, 594 ADDR_PIPECFG_P8_32x32_16x32 = 14, 595 ADDR_PIPECFG_P8_32x64_32x32 = 15, 596 ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes 597 ADDR_PIPECFG_P16_32x32_16x16 = 18, 598 ADDR_PIPECFG_UNUSED = 19, 599 ADDR_PIPECFG_MAX = 20, 600 } AddrPipeCfg; 601 602 /** 603 **************************************************************************************************** 604 * AddrTileType 605 * 606 * @brief 607 * Neutral enums that specifies micro tile type (MICRO_TILE_MODE) 608 **************************************************************************************************** 609 */ 610 typedef enum _AddrTileType 611 { 612 ADDR_DISPLAYABLE = 0, ///< Displayable tiling 613 ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling 614 ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order 615 ADDR_ROTATED = 3, ///< Rotated displayable tiling 616 ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK 617 } AddrTileType; 618 619 //////////////////////////////////////////////////////////////////////////////////////////////////// 620 // 621 // Type definitions: short system-independent names for address library types 622 // 623 //////////////////////////////////////////////////////////////////////////////////////////////////// 624 625 #if !defined(__APPLE__) || defined(HAVE_TSERVER) 626 627 #ifndef BOOL_32 // no bool type in C 628 /// @brief Boolean type, since none is defined in C 629 /// @ingroup type 630 #define BOOL_32 int 631 #endif 632 633 #ifndef INT_32 634 #define INT_32 int 635 #endif 636 637 #ifndef UINT_32 638 #define UINT_32 unsigned int 639 #endif 640 641 #ifndef INT_16 642 #define INT_16 short 643 #endif 644 645 #ifndef UINT_16 646 #define UINT_16 unsigned short 647 #endif 648 649 #ifndef INT_8 650 #define INT_8 signed char // signed must be used because of aarch64 651 #endif 652 653 #ifndef UINT_8 654 #define UINT_8 unsigned char 655 #endif 656 657 #ifndef NULL 658 #define NULL 0 659 #endif 660 661 #ifndef TRUE 662 #define TRUE 1 663 #endif 664 665 #ifndef FALSE 666 #define FALSE 0 667 #endif 668 669 // 670 // 64-bit integer types depend on the compiler 671 // 672 #if defined( __GNUC__ ) || defined( __WATCOMC__ ) 673 #define INT_64 long long 674 #define UINT_64 unsigned long long 675 676 #elif defined( _WIN32 ) 677 #define INT_64 __int64 678 #define UINT_64 unsigned __int64 679 680 #else 681 #error Unsupported compiler and/or operating system for 64-bit integers 682 683 /// @brief 64-bit signed integer type (compiler dependent) 684 /// @ingroup type 685 /// 686 /// The addrlib defines a 64-bit signed integer type for either 687 /// Gnu/Watcom compilers (which use the first syntax) or for 688 /// the Windows VCC compiler (which uses the second syntax). 689 #define INT_64 long long OR __int64 690 691 /// @brief 64-bit unsigned integer type (compiler dependent) 692 /// @ingroup type 693 /// 694 /// The addrlib defines a 64-bit unsigned integer type for either 695 /// Gnu/Watcom compilers (which use the first syntax) or for 696 /// the Windows VCC compiler (which uses the second syntax). 697 /// 698 #define UINT_64 unsigned long long OR unsigned __int64 699 #endif 700 701 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER) 702 703 // ADDR64X is used to print addresses in hex form on both Windows and Linux 704 // 705 #if defined( __GNUC__ ) || defined( __WATCOMC__ ) 706 #define ADDR64X "llx" 707 #define ADDR64D "lld" 708 709 #elif defined( _WIN32 ) 710 #define ADDR64X "I64x" 711 #define ADDR64D "I64d" 712 713 #else 714 #error Unsupported compiler and/or operating system for 64-bit integers 715 716 /// @brief Addrlib device address 64-bit printf tag (compiler dependent) 717 /// @ingroup type 718 /// 719 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler 720 /// (which used this value) or the Gnu/Watcom compilers (which use "llx". 721 /// An example of use is printf("addr 0x%"ADDR64X"\n", address); 722 /// 723 #define ADDR64X "llx" OR "I64x" 724 #define ADDR64D "lld" OR "I64d" 725 #endif 726 727 728 /// @brief Union for storing a 32-bit float or 32-bit integer 729 /// @ingroup type 730 /// 731 /// This union provides a simple way to convert between a 32-bit float 732 /// and a 32-bit integer. It also prevents the compiler from producing 733 /// code that alters NaN values when assiging or coying floats. 734 /// Therefore, all address library routines that pass or return 32-bit 735 /// floating point data do so by passing or returning a FLT_32. 736 /// 737 typedef union { 738 INT_32 i; 739 UINT_32 u; 740 float f; 741 } ADDR_FLT_32; 742 743 744 //////////////////////////////////////////////////////////////////////////////////////////////////// 745 // 746 // Macros for controlling linking and building on multiple systems 747 // 748 //////////////////////////////////////////////////////////////////////////////////////////////////// 749 #if defined(_MSC_VER) 750 #if defined(va_copy) 751 #undef va_copy //redefine va_copy to support VC2013 752 #endif 753 #endif 754 755 #if !defined(va_copy) 756 #define va_copy(dst, src) \ 757 ((void) memcpy(&(dst), &(src), sizeof(va_list))) 758 #endif 759 760 #endif // __ADDR_TYPES_H__ 761 762