1 /*
2 * Copyright 2003 VMware, Inc.
3 * Copyright © 2006 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 /**
26 * \file intel_debug.c
27 *
28 * Support for the INTEL_DEBUG environment variable, along with other
29 * miscellaneous debugging code.
30 */
31
32 #include <stdio.h>
33 #include <stdlib.h>
34 #include <string.h>
35
36 #include "dev/intel_debug.h"
37 #include "git_sha1.h"
38 #include "util/macros.h"
39 #include "util/u_debug.h"
40 #include "util/u_math.h"
41 #include "c11/threads.h"
42
43 uint64_t intel_debug = 0;
44
45 #define DEBUG_NO16 (1ull << 16)
46 #define DEBUG_NO8 (1ull << 20)
47 #define DEBUG_NO32 (1ull << 39)
48
49 static const struct debug_control debug_control[] = {
50 { "tex", DEBUG_TEXTURE},
51 { "blit", DEBUG_BLIT},
52 { "fall", DEBUG_PERF},
53 { "perf", DEBUG_PERF},
54 { "perfmon", DEBUG_PERFMON},
55 { "bat", DEBUG_BATCH},
56 { "buf", DEBUG_BUFMGR},
57 { "fs", DEBUG_WM },
58 { "gs", DEBUG_GS},
59 { "sync", DEBUG_SYNC},
60 { "sf", DEBUG_SF },
61 { "submit", DEBUG_SUBMIT },
62 { "wm", DEBUG_WM },
63 { "urb", DEBUG_URB },
64 { "vs", DEBUG_VS },
65 { "clip", DEBUG_CLIP },
66 { "no16", DEBUG_NO16 },
67 { "blorp", DEBUG_BLORP },
68 { "nodualobj", DEBUG_NO_DUAL_OBJECT_GS },
69 { "optimizer", DEBUG_OPTIMIZER },
70 { "ann", DEBUG_ANNOTATION },
71 { "no8", DEBUG_NO8 },
72 { "no-oaconfig", DEBUG_NO_OACONFIG },
73 { "spill_fs", DEBUG_SPILL_FS },
74 { "spill_vec4", DEBUG_SPILL_VEC4 },
75 { "cs", DEBUG_CS },
76 { "hex", DEBUG_HEX },
77 { "nocompact", DEBUG_NO_COMPACTION },
78 { "hs", DEBUG_TCS },
79 { "tcs", DEBUG_TCS },
80 { "ds", DEBUG_TES },
81 { "tes", DEBUG_TES },
82 { "l3", DEBUG_L3 },
83 { "do32", DEBUG_DO32 },
84 { "norbc", DEBUG_NO_CCS },
85 { "noccs", DEBUG_NO_CCS },
86 { "nohiz", DEBUG_NO_HIZ },
87 { "color", DEBUG_COLOR },
88 { "reemit", DEBUG_REEMIT },
89 { "soft64", DEBUG_SOFT64 },
90 { "bt", DEBUG_BT },
91 { "pc", DEBUG_PIPE_CONTROL },
92 { "nofc", DEBUG_NO_FAST_CLEAR },
93 { "no32", DEBUG_NO32 },
94 { "shaders", DEBUG_WM | DEBUG_VS | DEBUG_TCS |
95 DEBUG_TES | DEBUG_GS | DEBUG_CS |
96 DEBUG_RT | DEBUG_TASK | DEBUG_MESH },
97 { "rt", DEBUG_RT },
98 { "task", DEBUG_TASK },
99 { "mesh", DEBUG_MESH },
100 { "stall", DEBUG_STALL },
101 { "capture-all", DEBUG_CAPTURE_ALL },
102 { "perf-symbol-names", DEBUG_PERF_SYMBOL_NAMES },
103 { "swsb-stall", DEBUG_SWSB_STALL },
104 { "heaps", DEBUG_HEAPS },
105 { "isl", DEBUG_ISL },
106 { "sparse", DEBUG_SPARSE },
107 { "draw_bkp", DEBUG_DRAW_BKP },
108 { "bat-stats", DEBUG_BATCH_STATS },
109 { NULL, 0 }
110 };
111
112 uint64_t intel_simd = 0;
113
114 static const struct debug_control simd_control[] = {
115 { "fs8", DEBUG_FS_SIMD8 },
116 { "fs16", DEBUG_FS_SIMD16 },
117 { "fs32", DEBUG_FS_SIMD32 },
118 { "fs2x8", DEBUG_FS_SIMD2X8 },
119 { "fs4x8", DEBUG_FS_SIMD4X8 },
120 { "fs2x16", DEBUG_FS_SIMD2X16 },
121 { "cs8", DEBUG_CS_SIMD8 },
122 { "cs16", DEBUG_CS_SIMD16 },
123 { "cs32", DEBUG_CS_SIMD32 },
124 { "ts8", DEBUG_TS_SIMD8 },
125 { "ts16", DEBUG_TS_SIMD16 },
126 { "ts32", DEBUG_TS_SIMD32 },
127 { "ms8", DEBUG_MS_SIMD8 },
128 { "ms16", DEBUG_MS_SIMD16 },
129 { "ms32", DEBUG_MS_SIMD32 },
130 { "rt8", DEBUG_RT_SIMD8 },
131 { "rt16", DEBUG_RT_SIMD16 },
132 { "rt32", DEBUG_RT_SIMD32 },
133 { NULL, 0 }
134 };
135
136 uint64_t
intel_debug_flag_for_shader_stage(gl_shader_stage stage)137 intel_debug_flag_for_shader_stage(gl_shader_stage stage)
138 {
139 uint64_t flags[] = {
140 [MESA_SHADER_VERTEX] = DEBUG_VS,
141 [MESA_SHADER_TESS_CTRL] = DEBUG_TCS,
142 [MESA_SHADER_TESS_EVAL] = DEBUG_TES,
143 [MESA_SHADER_GEOMETRY] = DEBUG_GS,
144 [MESA_SHADER_FRAGMENT] = DEBUG_WM,
145 [MESA_SHADER_COMPUTE] = DEBUG_CS,
146 [MESA_SHADER_KERNEL] = DEBUG_CS,
147
148 [MESA_SHADER_TASK] = DEBUG_TASK,
149 [MESA_SHADER_MESH] = DEBUG_MESH,
150
151 [MESA_SHADER_RAYGEN] = DEBUG_RT,
152 [MESA_SHADER_ANY_HIT] = DEBUG_RT,
153 [MESA_SHADER_CLOSEST_HIT] = DEBUG_RT,
154 [MESA_SHADER_MISS] = DEBUG_RT,
155 [MESA_SHADER_INTERSECTION] = DEBUG_RT,
156 [MESA_SHADER_CALLABLE] = DEBUG_RT,
157 };
158 return flags[stage];
159 }
160
161 #define DEBUG_FS_SIMD (DEBUG_FS_SIMD8 | DEBUG_FS_SIMD16 | \
162 DEBUG_FS_SIMD32)
163 #define DEBUG_CS_SIMD (DEBUG_CS_SIMD8 | DEBUG_CS_SIMD16 | DEBUG_CS_SIMD32)
164 #define DEBUG_TS_SIMD (DEBUG_TS_SIMD8 | DEBUG_TS_SIMD16 | DEBUG_TS_SIMD32)
165 #define DEBUG_MS_SIMD (DEBUG_MS_SIMD8 | DEBUG_MS_SIMD16 | DEBUG_MS_SIMD32)
166 #define DEBUG_RT_SIMD (DEBUG_RT_SIMD8 | DEBUG_RT_SIMD16 | DEBUG_RT_SIMD32)
167
168 #define DEBUG_SIMD8_ALL \
169 (DEBUG_FS_SIMD8 | \
170 DEBUG_CS_SIMD8 | \
171 DEBUG_TS_SIMD8 | \
172 DEBUG_MS_SIMD8 | \
173 DEBUG_RT_SIMD8)
174
175 #define DEBUG_SIMD16_ALL \
176 (DEBUG_FS_SIMD16 | \
177 DEBUG_CS_SIMD16 | \
178 DEBUG_TS_SIMD16 | \
179 DEBUG_MS_SIMD16 | \
180 DEBUG_RT_SIMD16)
181
182 #define DEBUG_SIMD32_ALL \
183 (DEBUG_FS_SIMD32 | \
184 DEBUG_CS_SIMD32 | \
185 DEBUG_TS_SIMD32 | \
186 DEBUG_MS_SIMD32 | \
187 DEBUG_RT_SIMD32)
188
189 static uint64_t intel_debug_batch_frame_start = 0;
190 static uint64_t intel_debug_batch_frame_stop = -1;
191
192 uint32_t intel_debug_bkp_before_draw_count = 0;
193 uint32_t intel_debug_bkp_after_draw_count = 0;
194
195 static void
process_intel_debug_variable_once(void)196 process_intel_debug_variable_once(void)
197 {
198 intel_debug = parse_debug_string(getenv("INTEL_DEBUG"), debug_control);
199 intel_simd = parse_debug_string(getenv("INTEL_SIMD_DEBUG"), simd_control);
200 intel_debug_batch_frame_start =
201 debug_get_num_option("INTEL_DEBUG_BATCH_FRAME_START", 0);
202 intel_debug_batch_frame_stop =
203 debug_get_num_option("INTEL_DEBUG_BATCH_FRAME_STOP", -1);
204
205 intel_debug_bkp_before_draw_count =
206 debug_get_num_option("INTEL_DEBUG_BKP_BEFORE_DRAW_COUNT", 0);
207 intel_debug_bkp_after_draw_count =
208 debug_get_num_option("INTEL_DEBUG_BKP_AFTER_DRAW_COUNT", 0);
209
210 if (!(intel_simd & DEBUG_FS_SIMD))
211 intel_simd |= DEBUG_FS_SIMD;
212 if (!(intel_simd & DEBUG_CS_SIMD))
213 intel_simd |= DEBUG_CS_SIMD;
214 if (!(intel_simd & DEBUG_TS_SIMD))
215 intel_simd |= DEBUG_TS_SIMD;
216 if (!(intel_simd & DEBUG_MS_SIMD))
217 intel_simd |= DEBUG_MS_SIMD;
218 if (!(intel_simd & DEBUG_RT_SIMD))
219 intel_simd |= DEBUG_RT_SIMD;
220
221 if (intel_debug & DEBUG_NO8)
222 intel_simd &= ~DEBUG_SIMD8_ALL;
223 if (intel_debug & DEBUG_NO16)
224 intel_simd &= ~DEBUG_SIMD16_ALL;
225 if (intel_debug & DEBUG_NO32)
226 intel_simd &= ~DEBUG_SIMD32_ALL;
227 intel_debug &= ~(DEBUG_NO8 | DEBUG_NO16 | DEBUG_NO32);
228 }
229
230 void
process_intel_debug_variable(void)231 process_intel_debug_variable(void)
232 {
233 static once_flag process_intel_debug_variable_flag = ONCE_FLAG_INIT;
234
235 call_once(&process_intel_debug_variable_flag,
236 process_intel_debug_variable_once);
237 }
238
239 static uint64_t debug_identifier[4] = {
240 0xffeeddccbbaa9988,
241 0x7766554433221100,
242 0xffeeddccbbaa9988,
243 0x7766554433221100,
244 };
245
246 void *
intel_debug_identifier(void)247 intel_debug_identifier(void)
248 {
249 return debug_identifier;
250 }
251
252 uint32_t
intel_debug_identifier_size(void)253 intel_debug_identifier_size(void)
254 {
255 return sizeof(debug_identifier);
256 }
257
258 uint32_t
intel_debug_write_identifiers(void * _output,uint32_t output_size,const char * driver_name)259 intel_debug_write_identifiers(void *_output,
260 uint32_t output_size,
261 const char *driver_name)
262 {
263 void *output = _output, *output_end = _output + output_size;
264
265 assert(output_size > intel_debug_identifier_size());
266
267 memcpy(output, intel_debug_identifier(), intel_debug_identifier_size());
268 output += intel_debug_identifier_size();
269
270 for (uint32_t id = INTEL_DEBUG_BLOCK_TYPE_DRIVER; id < INTEL_DEBUG_BLOCK_TYPE_MAX; id++) {
271 switch (id) {
272 case INTEL_DEBUG_BLOCK_TYPE_DRIVER: {
273 struct intel_debug_block_driver driver_desc = {
274 .base = {
275 .type = id,
276 },
277 };
278 int len = snprintf(output + sizeof(driver_desc),
279 output_end - (output + sizeof(driver_desc)),
280 "%s " PACKAGE_VERSION " build " MESA_GIT_SHA1,
281 driver_name);
282 driver_desc.base.length = sizeof(driver_desc) + len + 1;
283 memcpy(output, &driver_desc, sizeof(driver_desc));
284 output += driver_desc.base.length;
285 break;
286 }
287
288 case INTEL_DEBUG_BLOCK_TYPE_FRAME: {
289 struct intel_debug_block_frame frame_desc = {
290 .base = {
291 .type = INTEL_DEBUG_BLOCK_TYPE_FRAME,
292 .length = sizeof(frame_desc),
293 },
294 };
295 memcpy(output, &frame_desc, sizeof(frame_desc));
296 output += sizeof(frame_desc);
297 break;
298 }
299
300 default:
301 unreachable("Missing identifier write");
302 }
303
304 assert(output < output_end);
305 }
306
307 struct intel_debug_block_base end = {
308 .type = INTEL_DEBUG_BLOCK_TYPE_END,
309 .length = sizeof(end),
310 };
311 memcpy(output, &end, sizeof(end));
312 output += sizeof(end);
313
314 assert(output < output_end);
315
316 /* Add at least a full aligned uint64_t of zero padding at the end
317 * to make the identifiers easier to spot.
318 */
319 const unsigned unpadded_len = output - _output;
320 const unsigned padding = ALIGN(unpadded_len + 8, 8) - unpadded_len;
321 memset(output, 0, padding);
322 output += padding;
323
324 assert(output < output_end);
325
326 /* Return the how many bytes where written, so that the rest of the buffer
327 * can be used for other things.
328 */
329 return output - _output;
330 }
331
332 void *
intel_debug_get_identifier_block(void * _buffer,uint32_t buffer_size,enum intel_debug_block_type type)333 intel_debug_get_identifier_block(void *_buffer,
334 uint32_t buffer_size,
335 enum intel_debug_block_type type)
336 {
337 void *buffer = _buffer + intel_debug_identifier_size(),
338 *end_buffer = _buffer + buffer_size;
339
340 while (buffer < end_buffer) {
341 struct intel_debug_block_base *item = buffer;
342
343 if (item->type == type)
344 return item;
345 if (item->type == INTEL_DEBUG_BLOCK_TYPE_END)
346 return NULL;
347
348 buffer += item->length;
349 }
350
351 return NULL;
352 }
353
354 /**
355 * Check if in valid frame range for batch dumping
356 */
357 bool
intel_debug_batch_in_range(uint64_t frame_id)358 intel_debug_batch_in_range(uint64_t frame_id)
359 {
360 return frame_id >= intel_debug_batch_frame_start &&
361 frame_id < intel_debug_batch_frame_stop;
362 }
363