1 /* Copyright 2022 Advanced Micro Devices, Inc.
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a
4 * copy of this software and associated documentation files (the "Software"),
5 * to deal in the Software without restriction, including without limitation
6 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7 * and/or sell copies of the Software, and to permit persons to whom the
8 * Software is furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19 * OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * Authors: AMD
22 *
23 */
24
25 #include "vpe_assert.h"
26 #include "common.h"
27 #include "reg_helper.h"
28 #include "vpe_desc_writer.h"
29 #include "vpe_command.h"
30
vpe_desc_writer_init(struct vpe_desc_writer * writer,struct vpe_buf * buf,int cd)31 void vpe_desc_writer_init(struct vpe_desc_writer *writer, struct vpe_buf *buf, int cd)
32 {
33 uint32_t *cmd_space;
34 uint64_t size = sizeof(uint32_t);
35
36 writer->base_cpu_va = buf->cpu_va;
37 writer->base_gpu_va = buf->gpu_va;
38 writer->buf = buf;
39 writer->num_config_desc = 0;
40 writer->plane_desc_added = false;
41 writer->status = VPE_STATUS_OK;
42
43 if (buf->size < size) {
44 writer->status = VPE_STATUS_BUFFER_OVERFLOW;
45 return;
46 }
47 cmd_space = (uint32_t *)(uintptr_t)writer->buf->cpu_va;
48 *cmd_space++ = VPE_DESC_CMD_HEADER(cd);
49
50 writer->buf->cpu_va += size;
51 writer->buf->gpu_va += size;
52 writer->buf->size -= size;
53 }
54
55 /** fill the value to the command buffer. */
vpe_desc_writer_add_plane_desc(struct vpe_desc_writer * writer,uint64_t plane_desc_addr,bool tmz)56 void vpe_desc_writer_add_plane_desc(
57 struct vpe_desc_writer *writer, uint64_t plane_desc_addr, bool tmz)
58 {
59 uint32_t *cmd_space;
60 uint64_t size = 3 * sizeof(uint32_t);
61
62 if (writer->status != VPE_STATUS_OK)
63 return;
64
65 /* Buffer does not have enough space to write */
66 if (writer->buf->size < size) {
67 writer->status = VPE_STATUS_BUFFER_OVERFLOW;
68 return;
69 }
70
71 cmd_space = (uint32_t *)(uintptr_t)writer->buf->cpu_va;
72
73 VPE_ASSERT(!(plane_desc_addr & 0x3));
74 VPE_ASSERT(!writer->plane_desc_added);
75
76 *cmd_space++ = (ADDR_LO(plane_desc_addr) | (unsigned)tmz);
77 *cmd_space++ = ADDR_HI(plane_desc_addr);
78
79 // skip the DW3 as well, which is finalized during complete
80
81 writer->buf->cpu_va += size;
82 writer->buf->gpu_va += size;
83 writer->buf->size -= size;
84 writer->plane_desc_added = true;
85 }
86
87 /** fill the value to the command buffer. */
vpe_desc_writer_add_config_desc(struct vpe_desc_writer * writer,uint64_t config_desc_addr,bool reuse,bool tmz)88 void vpe_desc_writer_add_config_desc(
89 struct vpe_desc_writer *writer, uint64_t config_desc_addr, bool reuse, bool tmz)
90 {
91 uint32_t *cmd_space;
92 uint64_t size = 2 * sizeof(uint32_t);
93
94 if (writer->status != VPE_STATUS_OK)
95 return;
96
97 /* Buffer does not have enough space to write */
98 if (writer->buf->size < size) {
99 writer->status = VPE_STATUS_BUFFER_OVERFLOW;
100 return;
101 }
102
103 cmd_space = (uint32_t *)(uintptr_t)writer->buf->cpu_va;
104
105 VPE_ASSERT(!(config_desc_addr & 0x3));
106
107 *cmd_space++ = (ADDR_LO(config_desc_addr) | ((unsigned)reuse << 1) | (unsigned)tmz);
108 *cmd_space++ = ADDR_HI(config_desc_addr);
109
110 writer->buf->cpu_va += size;
111 writer->buf->gpu_va += size;
112 writer->buf->size -= size;
113 writer->num_config_desc++;
114 }
115
vpe_desc_writer_complete(struct vpe_desc_writer * writer)116 void vpe_desc_writer_complete(struct vpe_desc_writer *writer)
117 {
118 uint32_t *cmd_space;
119 if (writer->status != VPE_STATUS_OK)
120 return;
121
122 // NUM_CONFIG_DESCRIPTOR is at DW3
123 cmd_space = (uint32_t *)(uintptr_t)(writer->base_cpu_va + 3 * sizeof(uint32_t));
124
125 VPE_ASSERT(!(writer->num_config_desc & 0xFFFFFF00));
126 VPE_ASSERT(writer->num_config_desc > 0);
127 // NUM_CONFIG_DESCRIPTOR is 1-based
128 *cmd_space = (writer->num_config_desc - 1) & 0xFF;
129 }
130