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Searched refs:DWARFReg (Results 1 – 10 of 10) sorted by relevance

/art/compiler/utils/arm64/
Dassembler_arm64.cc119 cfi_.RelOffset(DWARFReg(dst0), offset); in SpillRegisters()
126 cfi_.RelOffset(DWARFReg(dst0), offset); in SpillRegisters()
127 cfi_.RelOffset(DWARFReg(dst1), offset + size); in SpillRegisters()
133 cfi_.RelOffset(DWARFReg(dst0), offset); in SpillRegisters()
145 cfi_.Restore(DWARFReg(dst0)); in UnspillRegisters()
152 cfi_.Restore(DWARFReg(dst0)); in UnspillRegisters()
153 cfi_.Restore(DWARFReg(dst1)); in UnspillRegisters()
159 cfi_.Restore(DWARFReg(dst0)); in UnspillRegisters()
Dassembler_arm64.h46 static inline dwarf::Reg DWARFReg(vixl::aarch64::CPURegister reg) { in DWARFReg() function
/art/compiler/utils/x86_64/
Djni_macro_assembler_x86_64.cc29 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg() function
32 static dwarf::Reg DWARFReg(FloatRegister reg) { in DWARFReg() function
65 cfi().RelOffset(DWARFReg(spill.AsCpuRegister().AsRegister()), 0); in BuildFrame()
84 cfi().RelOffset(DWARFReg(spill.AsXmmRegister().AsFloatRegister()), offset); in BuildFrame()
110 cfi().Restore(DWARFReg(spill.AsXmmRegister().AsFloatRegister())); in RemoveFrame()
127 cfi().Restore(DWARFReg(spill.AsCpuRegister().AsRegister())); in RemoveFrame()
/art/compiler/utils/arm/
Dassembler_arm_vixl.h40 inline dwarf::Reg DWARFReg(vixl32::Register reg) { in DWARFReg() function
44 inline dwarf::Reg DWARFReg(vixl32::SRegister reg) { in DWARFReg() function
Djni_macro_assembler_arm_vixl.cc112 cfi().RelOffset(DWARFReg(lr), kFramePointerSize); in BuildFrame()
116 cfi().RelOffsetForMany(DWARFReg(r0), 0, core_spill_mask, kFramePointerSize); in BuildFrame()
126 cfi().RelOffsetForMany(DWARFReg(s0), 0, fp_spill_mask, kFramePointerSize); in BuildFrame()
197 cfi().RestoreMany(DWARFReg(s0), fp_spill_mask); in RemoveFrame()
205 cfi().RestoreMany(DWARFReg(r0), core_spill_mask); in RemoveFrame()
/art/compiler/utils/x86/
Djni_macro_assembler_x86.cc35 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg() function
66 cfi().RelOffset(DWARFReg(spill), 0); in BuildFrame()
99 cfi().Restore(DWARFReg(spill)); in RemoveFrame()
/art/compiler/optimizing/
Dcode_generator_x86_64.cc1649 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg() function
1653 static dwarf::Reg DWARFReg(FloatRegister reg) { in DWARFReg() function
1887 __ cfi().RelOffset(DWARFReg(reg), 0); in GenerateFrameEntry()
1900 __ cfi().RelOffset(DWARFReg(kFpuCalleeSaves[i]), offset); in GenerateFrameEntry()
1932 __ cfi().Restore(DWARFReg(kFpuCalleeSaves[i])); in GenerateFrameExit()
1944 __ cfi().Restore(DWARFReg(reg)); in GenerateFrameExit()
Dcode_generator_arm_vixl.cc2441 GetAssembler()->cfi().RelOffsetForMany(DWARFReg(kMethodRegister), in GenerateFrameEntry()
2449 GetAssembler()->cfi().RelOffset(DWARFReg(sreg), /*offset=*/ fp_spills_offset); in GenerateFrameEntry()
2454 GetAssembler()->cfi().RelOffsetForMany(DWARFReg(kMethodRegister), in GenerateFrameEntry()
2466 GetAssembler()->cfi().RelOffsetForMany(DWARFReg(s0), in GenerateFrameEntry()
2523 GetAssembler()->cfi().Restore(DWARFReg(sreg)); in GenerateFrameExit()
2546 GetAssembler()->cfi().RestoreMany(DWARFReg(vixl32::SRegister(0)), fpu_spill_mask_); in GenerateFrameExit()
Dcode_generator_x86.cc1204 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg() function
1445 __ cfi().RelOffset(DWARFReg(reg), 0); in GenerateFrameEntry()
1478 __ cfi().Restore(DWARFReg(reg)); in GenerateFrameExit()
Dcode_generator_arm64.cc1436 GetAssembler()->cfi().RelOffset(DWARFReg(lowest_spill), core_spills_offset); in GenerateFrameEntry()
1475 GetAssembler()->cfi().Restore(DWARFReg(lowest_spill)); in GenerateFrameExit()