Searched refs:FAddS (Results 1 – 5 of 5) sorted by relevance
/art/compiler/utils/riscv64/ |
D | assembler_riscv64.h | 427 void FAddS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm); 451 void FAddS(FRegister rd, FRegister rs1, FRegister rs2) { in FAddS() function 452 FAddS(rd, rs1, rs2, FPRoundingMode::kDefault); in FAddS()
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D | assembler_riscv64_test.cc | 3048 TEST_F(AssemblerRISCV64Test, FAddS) { in TEST_F() argument 3049 DriverStr(RepeatFFFRoundingMode(&Riscv64Assembler::FAddS, "fadd.s {reg1}, {reg2}, {reg3}, {rm}"), in TEST_F() 3054 DriverStr(RepeatFFF(&Riscv64Assembler::FAddS, "fadd.s {reg1}, {reg2}, {reg3}"), "FAddS_Default"); in TEST_F()
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D | assembler_riscv64.cc | 982 void Riscv64Assembler::FAddS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddS() function in art::riscv64::Riscv64Assembler
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/art/compiler/optimizing/ |
D | intrinsics_riscv64.cc | 5023 __ FAddS(ftmp, ftmp, in, FPRoundingMode::kRDN); in GenMathRound() local
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D | code_generator_riscv64.cc | 809 FpBinOp<FRegister, &Riscv64Assembler::FAddS, &Riscv64Assembler::FAddD>(rd, rs1, rs2, type); in FAdd()
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