| /art/runtime/interpreter/mterp/x86_64ng/ |
| D | invoke.S | 22 andq $$0xf, %r11
39 andq $$-2, %rdi // Remove the extra bit that marks it's a String.<init> method.
58 andq $$0xf, %r11
83 andq $$0xf, %r11
106 andq $$-4, %rax
157 andq $$0xf, %r11
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| D | main.S | 241 andq MACRO_LITERAL(-2), \reg
283 andq $$-2, \code_item // Remove the extra bit that marks it's a compact dex file.
370 andq $$-16, %r10
374 andq LITERAL(-__SIZEOF_POINTER__), \refs
427 andq MACRO_LITERAL(0xf), %rax
435 andq MACRO_LITERAL(0xf), %rax
441 andq MACRO_LITERAL(0xf), %rax
452 andq MACRO_LITERAL(0xf), %rax
458 andq MACRO_LITERAL(0xf), %rax
482 andq MACRO_LITERAL(0xf), %rax
[all …]
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| /art/runtime/arch/x86_64/ |
| D | jni_entrypoints_x86_64.S | 121 andq LITERAL(TAGGED_JNI_SP_MASK_TOGGLED64), %rax // ArtMethod** sp
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| D | quick_entrypoints_x86_64.S | 920 andq LITERAL(OBJECT_ALIGNMENT_MASK_TOGGLED64), %r9
979 andq MACRO_LITERAL(4), %rcx
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 831 void andq(CpuRegister dst, const Immediate& imm);
832 void andq(CpuRegister dst, CpuRegister src);
833 void andq(CpuRegister reg, const Address& address);
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| D | assembler_x86_64_test.cc | 912 DriverStr(RepeatRR(&x86_64::X86_64Assembler::andq, "andq %{reg2}, %{reg1}"), "andq"); in TEST_F()
916 DriverStr(RepeatRI(&x86_64::X86_64Assembler::andq, in TEST_F()
1219 DriverStr(RepeatRA(&x86_64::X86_64Assembler::andq, "andq {mem}, %{reg}"), "andq"); in TEST_F()
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| D | jni_macro_assembler_x86_64.cc | 476 __ andq(reg.AsX86_64().AsCpuRegister(), Immediate(~kIndirectRefKindMask)); in DecodeJNITransitionOrLocalJObject() local
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| D | assembler_x86_64.cc | 4273 void X86_64Assembler::andq(CpuRegister reg, const Immediate& imm) { in andq() function in art::x86_64::X86_64Assembler
4281 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq() function in art::x86_64::X86_64Assembler
4289 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq() function in art::x86_64::X86_64Assembler
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| /art/compiler/optimizing/ |
| D | intrinsics_x86_64.cc | 2816 __ andq(temp, temp_mask); in SwapBits64() local
2817 __ andq(reg, temp_mask); in SwapBits64() local
3000 __ andq(out, tmp); in GenOneBit() local
4576 __ andq(temp, value.AsRegister<CpuRegister>()); in GenerateVarHandleGetAndOp() local
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| D | code_generator_x86_64.cc | 4289 __ andq(out, tmp); in RemByPowerOfTwo() local
7803 __ andq(first_reg, Immediate(static_cast<int32_t>(value))); in HandleBitwiseOperation() local
7805 __ andq(first_reg, codegen_->LiteralInt64Address(value)); in HandleBitwiseOperation() local
7808 __ andq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex())); in HandleBitwiseOperation() local
7810 __ andq(first_reg, second.AsRegister<CpuRegister>()); in HandleBitwiseOperation() local
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