Searched refs:first_reg (Results 1 – 6 of 6) sorted by relevance
| /art/runtime/gc/space/ |
| D | region_space-inl.h | 408 Region* first_reg = ®ions_[left]; in AllocLargeInRange() local
409 DCHECK(first_reg->IsFree()); in AllocLargeInRange()
410 first_reg->UnfreeLarge(this, time_); in AllocLargeInRange()
419 first_reg->SetTop(first_reg->Begin() + allocated); in AllocLargeInRange()
422 first_reg->SetNewlyAllocated(); in AllocLargeInRange()
443 mirror::Object* large_region = reinterpret_cast<mirror::Object*>(first_reg->Begin()); in AllocLargeInRange()
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| /art/libdexfile/dex/ |
| D | dex_instruction.cc | 403 uint16_t first_reg = VRegC_3rc(); in DumpString() local
413 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
421 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
427 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
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| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 4974 CpuRegister first_reg = locations->InAt(0).AsRegister<CpuRegister>(); in HandleShift() local
4982 __ shll(first_reg, second_reg); in HandleShift()
4984 __ sarl(first_reg, second_reg); in HandleShift()
4986 __ shrl(first_reg, second_reg); in HandleShift()
4991 __ shll(first_reg, imm); in HandleShift()
4993 __ sarl(first_reg, imm); in HandleShift()
4995 __ shrl(first_reg, imm); in HandleShift()
5004 __ shlq(first_reg, second_reg); in HandleShift()
5006 __ sarq(first_reg, second_reg); in HandleShift()
5008 __ shrq(first_reg, second_reg); in HandleShift()
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| D | instruction_builder.h | 128 uint16_t first_reg,
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| D | code_generator_arm_vixl.cc | 5475 vixl32::Register first_reg = InputRegisterAt(op, 0); in HandleShift() local
5481 __ Lsl(out_reg, first_reg, out_reg); in HandleShift()
5483 __ Asr(out_reg, first_reg, out_reg); in HandleShift()
5485 __ Lsr(out_reg, first_reg, out_reg); in HandleShift()
5491 __ Mov(out_reg, first_reg); in HandleShift()
5493 __ Lsl(out_reg, first_reg, shift_value); in HandleShift()
5495 __ Asr(out_reg, first_reg, shift_value); in HandleShift()
5497 __ Lsr(out_reg, first_reg, shift_value); in HandleShift()
8767 vixl32::Register first_reg = RegisterFrom(first); in VisitBitwiseNegatedRight() local
8773 __ Bic(out_reg, first_reg, second_reg); in VisitBitwiseNegatedRight()
[all …]
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| D | code_generator_x86.cc | 4893 Register first_reg = first.AsRegister<Register>(); in HandleShift() local
4898 __ shll(first_reg, second_reg); in HandleShift()
4900 __ sarl(first_reg, second_reg); in HandleShift()
4902 __ shrl(first_reg, second_reg); in HandleShift()
4911 __ shll(first_reg, imm); in HandleShift()
4913 __ sarl(first_reg, imm); in HandleShift()
4915 __ shrl(first_reg, imm); in HandleShift()
5085 Register first_reg = first.AsRegister<Register>(); in VisitRor() local
5088 __ rorl(first_reg, second_reg); in VisitRor()
5091 __ rorl(first_reg, imm); in VisitRor()
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