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Searched refs:reg_class (Results 1 – 4 of 4) sorted by relevance

/frameworks/libs/binary_translation/backend/
Dgen_reg_class_lib.py20 for reg_class in reg_classes:
21 name = reg_class.get('name')
22 regs = reg_class.get('regs')
29 print(' %d,' % (reg_class.get('size')), file=f)
41 for reg_class in reg_classes:
43 for r in reg_class.get('regs'):
45 reg_class['regs'] = expanded_regs
46 expanded[reg_class.get('name')] = expanded_regs
/frameworks/libs/binary_translation/backend/common/
Dreg_alloc.cc319 const MachineRegClass* reg_class = lifetime->GetRegClass(); in AllocateLifetime() local
322 "allocating lifetime %s:\n%s", reg_class->GetDebugName(), lifetime->GetDebugString().c_str()); in AllocateLifetime()
326 if (reg_class->HasReg(pref_reg) && TryAssignHardReg(lifetime, pref_reg)) { in AllocateLifetime()
331 for (MachineReg hard_reg : *reg_class) { in AllocateLifetime()
342 for (MachineReg hard_reg : *reg_class) { in AllocateLifetime()
/frameworks/libs/binary_translation/intrinsics/
Dgen_intrinsics.py319 reg_class = intr.get('class')
322 if _check_reg_class_size(reg_class, desc.num_elements / 8):
357 reg_class = intr.get('class')
362 if (_check_reg_class_size(reg_class,
367 elif (reg_class in ('vector_8/single', 'vector_8/16/single', 'vector_16/single') and
506 def _check_reg_class_size(reg_class, size): argument
508 if size == 4 and reg_class == 'vector_4':
510 if size == 8 and reg_class in ('vector_8', 'vector_8/16', 'vector_8/16/single',
513 if size == 16 and reg_class in ('vector_16', 'vector_8/16', 'vector_8/16/single',
533 reg_class = intr.get('class')
[all …]
/frameworks/libs/binary_translation/backend/include/berberis/backend/common/
Dmachine_ir.h171 constexpr MachineRegKind(const MachineRegClass* reg_class, StandardAccess access) in MachineRegKind() argument
172 : reg_class_(reg_class), access_(access) {} in MachineRegKind()