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Searched refs:vreg (Results 1 – 12 of 12) sorted by relevance

/frameworks/libs/binary_translation/backend/x86_64/
Dliveness_analyzer_test.cc42 MachineReg vreg, in ExpectSingleLiveIn() argument
45 EXPECT_TRUE(liveness->IsLiveIn(bb, vreg)); in ExpectSingleLiveIn()
46 EXPECT_EQ(liveness->GetFirstLiveIn(bb), vreg); in ExpectSingleLiveIn()
47 EXPECT_EQ(liveness->GetNextLiveIn(bb, vreg), kInvalidMachineReg); in ExpectSingleLiveIn()
70 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
75 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
81 ExpectSingleLiveIn(&liveness, bb, vreg); in TEST()
106 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
111 builder.Gen<FakeInsnWithDefEarlyClobber>(vreg); in TEST()
117 ExpectNoLiveIns(&liveness, bb, vreg); in TEST()
[all …]
Dcontext_liveness_analyzer_test.cc59 auto vreg = machine_ir.AllocVReg(); in TEST() local
61 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
80 auto vreg = machine_ir.AllocVReg(); in TEST() local
82 builder.GenGet(vreg, GetThreadStateRegOffset(0)); in TEST()
86 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
107 auto vreg = machine_ir.AllocVReg(); in TEST() local
109 builder.GenGet(vreg, GetThreadStateRegOffset(1)); in TEST()
113 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
114 builder.GenPut(GetThreadStateRegOffset(1), vreg); in TEST()
115 builder.GenPut(GetThreadStateRegOffset(2), vreg); in TEST()
[all …]
Drename_vregs.cc54 MachineReg vreg) { in GenInterBasicBlockMove() argument
55 MachineReg pred_vreg = vreg_map->Get(vreg, pred_bb); in GenInterBasicBlockMove()
56 MachineReg succ_vreg = vreg_map->Get(vreg, succ_bb); in GenInterBasicBlockMove()
58 machine_ir->NewInsn<PseudoCopy>(succ_vreg, pred_vreg, vreg_map->GetMaxSize(vreg)); in GenInterBasicBlockMove()
91 for (auto vreg = liveness.GetFirstLiveIn(succ_bb); vreg != kInvalidMachineReg; in RenameVRegs() local
92 vreg = liveness.GetNextLiveIn(succ_bb, vreg)) { in RenameVRegs()
93 GenInterBasicBlockMove(machine_ir, &vreg_map, bb, succ_bb, vreg); in RenameVRegs()
Dmachine_ir_test_corpus.cc65 MachineReg vreg = machine_ir->AllocVReg(); in BuildDataFlowFromTwoPreds() local
79 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in BuildDataFlowFromTwoPreds()
83 builder.Gen<x86_64::MovqRegImm>(vreg, 1); in BuildDataFlowFromTwoPreds()
87 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in BuildDataFlowFromTwoPreds()
90 return {bb1, bb2, bb3, vreg}; in BuildDataFlowFromTwoPreds()
96 MachineReg vreg = machine_ir->AllocVReg(); in BuildDataFlowToTwoSuccs() local
110 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in BuildDataFlowToTwoSuccs()
114 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in BuildDataFlowToTwoSuccs()
118 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in BuildDataFlowToTwoSuccs()
121 return {bb1, bb2, bb3, vreg}; in BuildDataFlowToTwoSuccs()
[all …]
Dmachine_ir_check_test.cc189 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
193 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
205 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
208 builder.Gen<PseudoIndirectJump>(vreg); in TEST()
209 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
224 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
228 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
231 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
249 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
253 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
[all …]
Drename_vregs_test.cc36 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
41 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
42 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
51 EXPECT_NE(vreg, new_vreg); in TEST()
63 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
71 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
75 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
84 EXPECT_NE(vreg, vreg_in_bb1); in TEST()
89 EXPECT_NE(vreg, vreg_in_bb2); in TEST()
162 auto [bb1, bb2, bb3, vreg] = BuildDataFlowFromTwoPreds(&machine_ir); in TEST()
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Dmachine_ir_test.cc64 MachineReg vreg = machine_ir.AllocVReg(); in TEST() local
69 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
70 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
74 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
78 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
Dmachine_ir_opt_test.cc403 auto vreg = machine_ir.AllocVReg(); in TEST() local
405 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
409 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
413 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
436 auto vreg = machine_ir.AllocVReg(); in TEST() local
438 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
442 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
505 auto vreg = machine_ir.AllocVReg(); in TEST() local
507 builder.GenPut(GetThreadStateRegOffset(0), vreg); in TEST()
511 builder.GenGet(vreg, GetThreadStateRegOffset(0)); in TEST()
[all …]
Dmachine_ir_opt.cc99 for (auto vreg : bb->live_out()) { in RemoveDeadCode() local
100 is_reg_used.Set(vreg); in RemoveDeadCode()
/frameworks/libs/binary_translation/backend/include/berberis/backend/x86_64/
Dliveness_analyzer.h55 MachineReg vreg = MachineReg::CreateVRegFromIndex(vreg_index); in GetNextLiveIn() local
56 if (IsLiveIn(bb, vreg)) { in GetNextLiveIn()
57 return vreg; in GetNextLiveIn()
/frameworks/libs/binary_translation/guest_state/riscv64/
Dguest_state_arch.cc75 std::size_t GetThreadStateVRegOffset(int vreg) { in GetThreadStateVRegOffset() argument
76 return offsetof(ThreadState, cpu.v[vreg]); in GetThreadStateVRegOffset()
/frameworks/libs/binary_translation/guest_state/include/berberis/guest_state/
Dguest_state_opaque.h99 std::size_t GetThreadStateVRegOffset(int vreg);