Searched refs:reg (Results 1 – 8 of 8) sorted by relevance
194 dex::u4 reg = regs - ins_count; in GenerateShiftParamsCode() local200 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg - shift)); in GenerateShiftParamsCode()201 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in GenerateShiftParamsCode()202 reg += 1; in GenerateShiftParamsCode()206 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg - shift)); in GenerateShiftParamsCode()207 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg)); in GenerateShiftParamsCode()208 reg += 1; in GenerateShiftParamsCode()212 move->operands.push_back(code_ir->Alloc<lir::VRegPair>(reg - shift)); in GenerateShiftParamsCode()213 move->operands.push_back(code_ir->Alloc<lir::VRegPair>(reg)); in GenerateShiftParamsCode()214 reg += 2; in GenerateShiftParamsCode()[all …]
75 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit() local79 dbginfo_.PushULeb128(reg); in Visit()85 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit() local90 dbginfo_.PushULeb128(reg); in Visit()98 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit() local100 dbginfo_.PushULeb128(reg); in Visit()
102 : bytecode->CastOperand<VReg>(index)->reg; in GetRegA()111 : bytecode->CastOperand<VReg>(index)->reg; in GetRegB()120 : bytecode->CastOperand<VReg>(index)->reg; in GetRegC()
235 dex::u4 reg = 0; in StressExitHook() local245 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in StressExitHook()251 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in StressExitHook()257 reg = bytecode->CastOperand<lir::VRegPair>(0)->base_reg; in StressExitHook()266 auto args = code_ir.Alloc<lir::VRegRange>(reg, reg_count); in StressExitHook()
134 printf("v%d", vreg->reg); in Visit()146 for (auto reg : vreg_list->registers) { in Visit() local147 printf("%sv%d", (first ? "" : ","), reg); in Visit()
156 dex::u4 reg; member158 explicit VReg(dex::u4 reg) : reg(reg) {} in VReg()
182 reg = re.compile(r'(.|\n)*}\n\n')183 if not reg.match(buf) or data == '':
1035 reg = (1039 if re.search(reg, content):