Home
last modified time | relevance | path

Searched refs:machine_ir (Results 1 – 25 of 43) sorted by relevance

12

/frameworks/libs/binary_translation/backend/x86_64/
Dmachine_ir_opt_test.cc36 x86_64::MachineIR machine_ir(&arena); in TEST() local
38 auto* bb = machine_ir.NewBasicBlock(); in TEST()
40 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
42 MachineReg vreg1 = machine_ir.AllocVReg(); in TEST()
51 x86_64::RemoveDeadCode(&machine_ir); in TEST()
65 x86_64::MachineIR machine_ir(&arena); in TEST() local
67 auto* bb = machine_ir.NewBasicBlock(); in TEST()
69 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
71 MachineReg vreg1 = machine_ir.AllocVReg(); in TEST()
72 MachineReg vreg2 = machine_ir.AllocVReg(); in TEST()
[all …]
Dmachine_ir_check_test.cc34 x86_64::MachineIR machine_ir(&arena); in TEST() local
36 auto* bb1 = machine_ir.NewBasicBlock(); in TEST()
37 auto* bb2 = machine_ir.NewBasicBlock(); in TEST()
38 machine_ir.bb_list().push_back(bb1); in TEST()
39 machine_ir.bb_list().push_back(bb2); in TEST()
46 EXPECT_EQ(x86_64::CheckMachineIR(machine_ir), x86_64::kMachineIRCheckFail); in TEST()
51 x86_64::MachineIR machine_ir(&arena); in TEST() local
53 auto* bb1 = machine_ir.NewBasicBlock(); in TEST()
54 auto* bb2 = machine_ir.NewBasicBlock(); in TEST()
55 machine_ir.bb_list().push_back(bb1); in TEST()
[all …]
Drename_copy_uses_test.cc32 x86_64::MachineIR machine_ir(&arena); in TEST() local
34 auto* bb = machine_ir.NewBasicBlock(); in TEST()
36 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
38 MachineReg vreg1 = machine_ir.AllocVReg(); in TEST()
39 MachineReg vreg2 = machine_ir.AllocVReg(); in TEST()
40 MachineReg vreg3 = machine_ir.AllocVReg(); in TEST()
47 ASSERT_EQ(CheckMachineIR(machine_ir), kMachineIRCheckSuccess); in TEST()
49 RenameCopyUsesMap map(&machine_ir); in TEST()
66 x86_64::MachineIR machine_ir(&arena); in TEST() local
68 auto* bb = machine_ir.NewBasicBlock(); in TEST()
[all …]
Dmachine_ir_analysis_test.cc48 x86_64::MachineIR machine_ir(&arena); in TEST() local
50 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
55 auto bb1 = machine_ir.NewBasicBlock(); in TEST()
56 auto bb2 = machine_ir.NewBasicBlock(); in TEST()
57 auto bb3 = machine_ir.NewBasicBlock(); in TEST()
58 machine_ir.AddEdge(bb1, bb2); in TEST()
59 machine_ir.AddEdge(bb2, bb2); in TEST()
60 machine_ir.AddEdge(bb2, bb3); in TEST()
71 ASSERT_EQ(x86_64::CheckMachineIR(machine_ir), x86_64::kMachineIRCheckSuccess); in TEST()
72 auto loops = x86_64::FindLoops(&machine_ir); in TEST()
[all …]
Dloop_guest_context_optimizer_test.cc37 MachineIR machine_ir(&arena); in TEST() local
39 MachineIRBuilder builder(&machine_ir); in TEST()
41 auto bb = machine_ir.NewBasicBlock(); in TEST()
43 auto reg1 = machine_ir.AllocVReg(); in TEST()
48 MemRegMap mem_reg_map(sizeof(CPUState), std::nullopt, machine_ir.arena()); in TEST()
49 ReplaceGetAndUpdateMap(&machine_ir, insn_it, mem_reg_map); in TEST()
50 ASSERT_EQ(CheckMachineIR(machine_ir), x86_64::kMachineIRCheckSuccess); in TEST()
62 MachineIR machine_ir(&arena); in TEST() local
64 MachineIRBuilder builder(&machine_ir); in TEST()
66 auto bb = machine_ir.NewBasicBlock(); in TEST()
[all …]
Dmachine_ir_test_corpus.cc34 BuildDataFlowAcrossBasicBlocks(x86_64::MachineIR* machine_ir) { in BuildDataFlowAcrossBasicBlocks() argument
35 x86_64::MachineIRBuilder builder(machine_ir); in BuildDataFlowAcrossBasicBlocks()
36 MachineReg vreg1 = machine_ir->AllocVReg(); in BuildDataFlowAcrossBasicBlocks()
37 MachineReg vreg2 = machine_ir->AllocVReg(); in BuildDataFlowAcrossBasicBlocks()
39 auto* bb1 = machine_ir->NewBasicBlock(); in BuildDataFlowAcrossBasicBlocks()
40 auto* bb2 = machine_ir->NewBasicBlock(); in BuildDataFlowAcrossBasicBlocks()
41 auto* bb3 = machine_ir->NewBasicBlock(); in BuildDataFlowAcrossBasicBlocks()
43 machine_ir->AddEdge(bb1, bb2); in BuildDataFlowAcrossBasicBlocks()
44 machine_ir->AddEdge(bb2, bb3); in BuildDataFlowAcrossBasicBlocks()
63 BuildDataFlowFromTwoPreds(x86_64::MachineIR* machine_ir) { in BuildDataFlowFromTwoPreds() argument
[all …]
Dinsn_folding_test.cc38 MachineIR machine_ir(&arena); in TryRegRegInsnFolding() local
39 auto* bb = machine_ir.NewBasicBlock(); in TryRegRegInsnFolding()
41 MachineIRBuilder builder(&machine_ir); in TryRegRegInsnFolding()
43 MachineReg vreg1 = machine_ir.AllocVReg(); in TryRegRegInsnFolding()
44 MachineReg vreg2 = machine_ir.AllocVReg(); in TryRegRegInsnFolding()
45 MachineReg flags = machine_ir.AllocVReg(); in TryRegRegInsnFolding()
58 DefMap def_map(machine_ir.NumVReg(), machine_ir.arena()); in TryRegRegInsnFolding()
63 InsnFolding insn_folding(def_map, &machine_ir); in TryRegRegInsnFolding()
86 MachineIR machine_ir(&arena); in TryMovInsnFolding() local
87 auto* bb = machine_ir.NewBasicBlock(); in TryMovInsnFolding()
[all …]
Dcontext_liveness_analyzer_test.cc54 x86_64::MachineIR machine_ir(&arena); in TEST() local
56 auto* bb = machine_ir.NewBasicBlock(); in TEST()
57 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
59 auto vreg = machine_ir.AllocVReg(); in TEST()
64 EXPECT_EQ(x86_64::CheckMachineIR(machine_ir), x86_64::kMachineIRCheckSuccess); in TEST()
65 x86_64::ContextLivenessAnalyzer analyzer(&machine_ir); in TEST()
73 x86_64::MachineIR machine_ir(&arena); in TEST() local
75 auto* bb1 = machine_ir.NewBasicBlock(); in TEST()
76 auto* bb2 = machine_ir.NewBasicBlock(); in TEST()
77 machine_ir.AddEdge(bb1, bb2); in TEST()
[all …]
Drename_vregs_local_test.cc31 x86_64::MachineIR machine_ir(&arena); in TEST() local
33 auto* bb = machine_ir.NewBasicBlock(); in TEST()
35 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
37 MachineReg vreg1 = machine_ir.AllocVReg(); in TEST()
38 MachineReg vreg2 = machine_ir.AllocVReg(); in TEST()
48 x86_64::RenameVRegsLocal(&machine_ir); in TEST()
64 x86_64::MachineIR machine_ir(&arena); in TEST() local
66 auto* bb = machine_ir.NewBasicBlock(); in TEST()
68 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
70 MachineReg vreg1 = machine_ir.AllocVReg(); in TEST()
[all …]
Dliveness_analyzer_test.cc67 x86_64::MachineIR machine_ir(&arena); in TEST() local
69 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
70 MachineReg vreg = machine_ir.AllocVReg(); in TEST()
72 auto* bb = machine_ir.NewBasicBlock(); in TEST()
78 x86_64::LivenessAnalyzer liveness(&machine_ir); in TEST()
103 x86_64::MachineIR machine_ir(&arena); in TEST() local
105 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
106 MachineReg vreg = machine_ir.AllocVReg(); in TEST()
108 auto* bb = machine_ir.NewBasicBlock(); in TEST()
114 x86_64::LivenessAnalyzer liveness(&machine_ir); in TEST()
[all …]
Dlocal_guest_context_optimizer_test.cc34 x86_64::MachineIR machine_ir(&arena); in TEST() local
36 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
38 auto bb = machine_ir.NewBasicBlock(); in TEST()
40 auto reg1 = machine_ir.AllocVReg(); in TEST()
41 auto reg2 = machine_ir.AllocVReg(); in TEST()
46 x86_64::RemoveLocalGuestContextAccesses(&machine_ir); in TEST()
47 ASSERT_EQ(x86_64::CheckMachineIR(machine_ir), x86_64::kMachineIRCheckSuccess); in TEST()
66 x86_64::MachineIR machine_ir(&arena); in TEST() local
68 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
70 auto bb = machine_ir.NewBasicBlock(); in TEST()
[all …]
Dmachine_ir_exec_test.cc46 void Init(x86_64::MachineIR& machine_ir) { in Init() argument
48 auto* last_insn = machine_ir.bb_list().back()->insn_list().back(); in Init()
49 if (!machine_ir.IsControlTransfer(last_insn)) { in Init()
50 auto* jump = machine_ir.template NewInsn<PseudoJump>(0); in Init()
51 machine_ir.bb_list().back()->insn_list().push_back(jump); in Init()
54 EXPECT_EQ(x86_64::CheckMachineIR(machine_ir), x86_64::kMachineIRCheckSuccess); in Init()
58 &machine_code, machine_ir.FrameSize(), machine_ir.bb_list().size(), machine_ir.arena()); in Init()
74 machine_ir.Emit(&as); in Init()
124 x86_64::MachineIR machine_ir(&arena); in TEST() local
126 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
[all …]
Dmachine_ir_test.cc32 x86_64::MachineIR machine_ir(&arena); in TEST() local
34 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
35 auto bb = machine_ir.NewBasicBlock(); in TEST()
47 auto new_bb = machine_ir.SplitBasicBlock(bb, insn_it); in TEST()
49 ASSERT_EQ(x86_64::CheckMachineIR(machine_ir), x86_64::kMachineIRCheckSuccess); in TEST()
50 EXPECT_TRUE(machine_ir.bb_list().size() == 2); in TEST()
58 x86_64::MachineIR machine_ir(&arena); in TEST() local
59 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
61 auto* bb1 = machine_ir.NewBasicBlock(); in TEST()
62 auto* bb2 = machine_ir.NewBasicBlock(); in TEST()
[all …]
Drename_vregs_test.cc33 x86_64::MachineIR machine_ir(&arena); in TEST() local
35 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
36 MachineReg vreg = machine_ir.AllocVReg(); in TEST()
38 auto* bb = machine_ir.NewBasicBlock(); in TEST()
45 x86_64::VRegMap vreg_map(&machine_ir); in TEST()
60 x86_64::MachineIR machine_ir(&arena); in TEST() local
62 x86_64::MachineIRBuilder builder(&machine_ir); in TEST()
63 MachineReg vreg = machine_ir.AllocVReg(); in TEST()
65 auto* bb1 = machine_ir.NewBasicBlock(); in TEST()
66 auto* bb2 = machine_ir.NewBasicBlock(); in TEST()
[all …]
Dmachine_ir_check.cc30 bool CheckBasicBlockInIR(const MachineBasicBlock* bb, const MachineIR& machine_ir) { in CheckBasicBlockInIR() argument
31 auto& bb_list = machine_ir.bb_list(); in CheckBasicBlockInIR()
35 MachineIRCheckStatus CheckNoDanglingEdgesOrBasicBlocks(const MachineIR& machine_ir, in CheckNoDanglingEdgesOrBasicBlocks() argument
38 if (machine_ir.bb_list().size() != 1) { in CheckNoDanglingEdgesOrBasicBlocks()
48 if (!CheckBasicBlockInIR(edge->dst(), machine_ir)) { in CheckNoDanglingEdgesOrBasicBlocks()
56 if (!CheckBasicBlockInIR(edge->src(), machine_ir)) { in CheckNoDanglingEdgesOrBasicBlocks()
115 MachineIRCheckStatus CheckCFG(const MachineIR& machine_ir) { in CheckCFG() argument
116 for (auto* bb : machine_ir.bb_list()) { in CheckCFG()
120 auto status = CheckNoDanglingEdgesOrBasicBlocks(machine_ir, bb); in CheckCFG()
133 MachineIRCheckStatus CheckMachineIR(const MachineIR& machine_ir) { in CheckMachineIR() argument
[all …]
Drename_vregs_local.cc53 MachineIR* machine_ir, in TryRenameRegOperand() argument
68 MachineReg new_reg = machine_ir->AllocVReg(); in TryRenameRegOperand()
72 insn_list.insert(insn_it, machine_ir->NewInsn<MovqRegReg>(new_reg, vreg_map.Get(reg))); in TryRenameRegOperand()
88 void RenameInsnListRegs(VRegMap& vreg_map, MachineInsnList& insn_list, MachineIR* machine_ir) { in RenameInsnListRegs() argument
94 TryRenameRegOperand(i, vreg_map, insn_it, machine_ir, insn_list); in RenameInsnListRegs()
109 MachineIR* machine_ir) { in RenameSuccessorsLiveIns() argument
117 insn_list.push_front(machine_ir->NewInsn<MovqRegReg>(old_reg, in_reg)); in RenameSuccessorsLiveIns()
125 void RenameVRegsLocal(MachineIR* machine_ir) { in RenameVRegsLocal() argument
126 for (auto* basic_block : machine_ir->bb_list()) { in RenameVRegsLocal()
131 VRegMap vreg_map(machine_ir->NumVReg(), machine_ir->arena()); in RenameVRegsLocal()
[all …]
Drename_vregs.cc50 void GenInterBasicBlockMove(MachineIR* machine_ir, in GenInterBasicBlockMove() argument
58 machine_ir->NewInsn<PseudoCopy>(succ_vreg, pred_vreg, vreg_map->GetMaxSize(vreg)); in GenInterBasicBlockMove()
79 void RenameVRegs(MachineIR* machine_ir) { in RenameVRegs() argument
80 LivenessAnalyzer liveness(machine_ir); in RenameVRegs()
81 VRegMap vreg_map(machine_ir); in RenameVRegs()
88 for (auto bb : machine_ir->bb_list()) { in RenameVRegs()
93 GenInterBasicBlockMove(machine_ir, &vreg_map, bb, succ_bb, vreg); in RenameVRegs()
/frameworks/libs/binary_translation/backend/riscv64_to_x86_64/
Dcode_gen.cc37 void GenCode(MachineIR* machine_ir, MachineCode* machine_code, const GenCodeParams& params) { in GenCode() argument
38 CHECK_EQ(CheckMachineIR(*machine_ir), kMachineIRCheckSuccess); in GenCode()
41 TRACE("%s", machine_ir->GetDebugString().c_str()); in GenCode()
45 RemoveCriticalEdges(machine_ir); in GenCode()
47 ReorderBasicBlocksInReversePostOrder(machine_ir); in GenCode()
48 MoveColdBlocksToEnd(machine_ir); in GenCode()
50 RemoveLoopGuestContextAccesses(machine_ir); in GenCode()
51 RenameVRegs(machine_ir); in GenCode()
53 RemoveLocalGuestContextAccesses(machine_ir); in GenCode()
54 RemoveRedundantPut(machine_ir); in GenCode()
[all …]
/frameworks/libs/binary_translation/backend/include/berberis/backend/x86_64/
Drename_vregs.h29 explicit VRegMap(MachineIR* machine_ir) in VRegMap() argument
30 : machine_ir_(machine_ir), in VRegMap()
32 machine_ir->NumBasicBlocks(), in VRegMap()
33 ArenaVector<MachineReg>(machine_ir->NumVReg(), kInvalidMachineReg, machine_ir->arena()), in VRegMap()
34 machine_ir->arena()), in VRegMap()
35 max_size_(machine_ir->NumVReg(), 0, machine_ir->arena()) {} in VRegMap()
50 void RenameVRegs(MachineIR* machine_ir);
Dliveness_analyzer.h29 explicit LivenessAnalyzer(const MachineIR* machine_ir) in LivenessAnalyzer() argument
30 : machine_ir_(machine_ir), in LivenessAnalyzer()
31 live_in_(machine_ir->NumBasicBlocks(), in LivenessAnalyzer()
32 VRegBitSet(machine_ir->NumVReg(), machine_ir->arena()), in LivenessAnalyzer()
33 machine_ir->arena()) {} in LivenessAnalyzer()
Dmachine_ir_test_corpus.h33 BuildDataFlowAcrossBasicBlocks(x86_64::MachineIR* machine_ir);
36 BuildDataFlowFromTwoPreds(x86_64::MachineIR* machine_ir);
39 BuildDataFlowToTwoSuccs(x86_64::MachineIR* machine_ir);
45 BuildDiamondControlFlow(x86_64::MachineIR* machine_ir);
52 BuildDataFlowAcrossEmptyLoop(x86_64::MachineIR* machine_ir);
Dmachine_ir_opt.h24 void RemoveDeadCode(MachineIR* machine_ir);
25 void RemoveCriticalEdges(MachineIR* machine_ir);
27 void RemoveForwarderBlocks(MachineIR* machine_ir);
28 void ReorderBasicBlocksInReversePostOrder(MachineIR* machine_ir);
/frameworks/libs/binary_translation/heavy_optimizer/riscv64/
Dfrontend_tests.cc58 MachineBasicBlock* FindEntryBasicBlock(const MachineIR* machine_ir) { in FindEntryBasicBlock() argument
59 for (auto* bb : machine_ir->bb_list()) { in FindEntryBasicBlock()
67 const MachineBasicBlock* FindEntrySuccessor(const MachineIR* machine_ir) { in FindEntrySuccessor() argument
68 auto* entry_bb = FindEntryBasicBlock(machine_ir); in FindEntrySuccessor()
87 x86_64::MachineIR machine_ir(&arena); in TEST() local
88 HeavyOptimizerFrontend frontend(&machine_ir, kStartGuestAddr); in TEST()
105 ASSERT_EQ(x86_64::CheckMachineIR(machine_ir), x86_64::kMachineIRCheckSuccess); in TEST()
126 x86_64::MachineIR machine_ir(&arena); in TEST() local
127 HeavyOptimizerFrontend frontend(&machine_ir, kStartGuestAddr); in TEST()
139 ASSERT_EQ(x86_64::CheckMachineIR(machine_ir), x86_64::kMachineIRCheckSuccess); in TEST()
[all …]
Dcall_intrinsic_tests.cc43 void Init(x86_64::MachineIR* machine_ir) { in Init() argument
44 auto* jump = machine_ir->template NewInsn<PseudoJump>(0); in Init()
45 machine_ir->bb_list().back()->insn_list().push_back(jump); in Init()
47 EXPECT_EQ(x86_64::CheckMachineIR(*machine_ir), x86_64::kMachineIRCheckSuccess); in Init()
51 &machine_code, machine_ir->FrameSize(), machine_ir->NumBasicBlocks(), machine_ir->arena()); in Init()
67 x86_64::GenCode(machine_ir, &machine_code, x86_64::GenCodeParams{.skip_emit = true}); in Init()
68 machine_ir->Emit(&as); in Init()
106 x86_64::MachineIR machine_ir(&arena); in CallOneArgumentIntrinsicUseIntegral() local
108 x86_64::MachineIRBuilder builder(&machine_ir); in CallOneArgumentIntrinsicUseIntegral()
109 builder.StartBasicBlock(machine_ir.NewBasicBlock()); in CallOneArgumentIntrinsicUseIntegral()
[all …]
/frameworks/libs/binary_translation/backend/common/
Dmachine_ir_opt.cc29 void RemoveNopPseudoCopy(MachineIR* machine_ir) { in RemoveNopPseudoCopy() argument
30 for (auto* machine_bb : machine_ir->bb_list()) { in RemoveNopPseudoCopy()
41 void RemoveForwarderBlocks(MachineIR* machine_ir) { in RemoveForwarderBlocks() argument
48 machine_ir->NumBasicBlocks(), nullptr, machine_ir->arena()); in RemoveForwarderBlocks()
52 for (const auto* machine_bb : machine_ir->bb_list()) { in RemoveForwarderBlocks()
89 for (const auto* machine_bb : machine_ir->bb_list()) { in RemoveForwarderBlocks()
117 forwarder_map[machine_ir->bb_list().front()->id()] = nullptr; in RemoveForwarderBlocks()
120 machine_ir->bb_list().remove_if([&forwarder_map](const MachineBasicBlock* machine_bb) { in RemoveForwarderBlocks()
136 void MoveColdBlocksToEnd(MachineIR* machine_ir) { in MoveColdBlocksToEnd() argument
140 CHECK(!machine_ir->bb_list().front()->is_recovery()); in MoveColdBlocksToEnd()
[all …]

12