Lines Matching +full:packet +full:- +full:verification +full:- +full:low +full:- +full:power
2 * Use of this source code is governed by a BSD-style license that can be
7 * config.h - Top-level configuration Chrome EC
10 * sub-configuration file (config_chip.h, board.h, etc.) included by this file.
12 * Note that this file is included by assembly (.S) files. Any C-isms such as
13 * struct definitions or enums in a sub-configuration file MUST be guarded with
14 * #ifndef __ASSEMBLER__ to prevent those C-isms from being evaluated by the
36 * git grep " CONFIG_" | grep -o "CONFIG_[A-Za-z0-9_]\+" | sort | uniq
50 /* Define the size of the global fifo, must be a power of 2. */
73 * during a reset. This is called Always-On, or AON memory, and
75 * values can be used to configure the RAM layout for Always-On.
120 * Z-axis: perpendicular to keyboard, pointing up, such that if the device
122 * X-axis: in the plane of the keyboard, pointing from the front lip to the
125 * Y-axis: in the plane of the keyboard, pointing to the right, such that
141 * +-----------+
147 * +-----------+
150 * +-----------+
156 * +-----------+
182 /* Compile chip support for analog-to-digital convertor */
186 * ADC sample time selection. The value is chip-dependent.
195 * Chip-dependent ADC configuration - select one.
196 * SINGLE - Sample all inputs once when requested.
197 * FAST_CONTINUOUS - Sample all inputs continuously using DMA, with minimal
203 /* Support AES symmetric-key algorithm */
206 /* Support AES-GCM */
236 * Define to use atime tables in anti-saturation algos in the tcs3400 driver.
237 * Defining this for a board makes the anti-saturation algorithm much more
307 * GPIO_ENABLE_BACKLIGHT_L if active low. See CONFIG_BACKLIGHT_LID_ACTIVE_LOW.
312 * The backlight GPIO pin is active low and named GPIO_BACKLIGHT_ENABLED_L
318 * asserted AND the lid is open. This supports passing the backlight-enable
336 * Compile battery-specific code.
353 * MAX17055 support alert on voltage, current, temperature, and state-of-charge.
367 /* Maximum time to wake a non-responsive battery, in second */
372 * presence as an additional condition to determine if power on is allowed for
374 * no power button press is required.
383 * Replace the default battery_is_present() function with a board-specific
389 * If defined, GPIO which is driven low when battery is present.
400 * http://sbs-forum.org/specs/sbdat110.pdf)
417 * If the battery is at extremely low charge (and discharging) or extremely
425 /* Perform a battery cut-off when we reach the battery critical level */
432 * Support battery cut-off as host command and console command.
446 * The board-specific battery.c implements get and set functions to read and
447 * write arbirary vendor-specific parameters stored in the battery.
460 * Check for battery in disconnect state (similar to cut-off state). If this
462 * force-applying a charge current. This option requires
480 * This is required on dual-battery systems, and on on hostless bases with a
541 /* Pack AP-FW bootblock in EC image. */
574 * The board is unable to distinguish EC reset from power-on so it should treat
587 * Enable debug prints / asserts that may helpful for debugging board bring-up,
646 * Number of charge ports excluding type-c ports
655 /* Allow charge manager to default to charging from dual-role partners */
658 /* Handle the external power limit host command in charge manager */
667 /* The hardware has some input current ramping/back-off mechanism */
679 /* Compile charger-specific code for these chargers (pick at most one) */
702 * Enable the CHG_EN at initialization to turn-on the BGATE which allows voltage
708 * BD9995X Power Save Mode
710 * Which power save mode should the charger enter when VBUS is removed. Check
711 * driver/bd9995x.h for the power save settings. By default, no power save mode
743 * If defined, Panel backlight power is controlled by MT6370.
748 * MT6370 BC1.2 USB-PHY control.
749 * If defined, USB-PHY connection is controlled by GPIO_BC12_DET_EN.
751 * GPIO_BC12_DET_EN to mux USB-PHY back.
756 * Enable/disable system power monitor PSYS function: this enables output
762 * Enable reading PSYS (system power) value, either via "psys" console command,
797 * This value should depend on external power adapter, designed charging
798 * voltage, and the maximum power of the running system. For type-C chargers,
799 * this should be set to 512 mA in order to not brown-out low-current USB
800 * charge ports in accordance with USB-PD r3.0 Sec. 7.3
820 * Leave charger VBAT configured to battery-requested voltage under all
827 * Power thresholds for AP boot
832 * 2. AC power >= CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON
835 * AC power >= CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT
838 * for the OS boot used by Depthcharge. The OS has higher power requirement
839 * but PD power is also available.
841 * WARNING: Locked RO firmware does not negotiate power greater than 15W via
852 /* Minimum battery percentage for power on with an imbalanced pack */
865 * Low energy thresholds - when battery level is below BAT_PCT and an external
866 * charger provides less than CHG_MW of power, inform the AP of the situation
884 * Enable charger's OTG functions, i.e. make it possible to supply output power
917 * GPIO_CHARGER_EN_L if active low.
921 /* Charger enable GPIO is active low */
933 * Chip needs to do pre-init very early in main(), and provides chip_pre_init()
949 #undef CONFIG_CHIPSET_ECDRIVEN /* Placeholder power module */
983 * Enable if chipset requires delay between power signals going high
991 /* Board requires chipset pre-init callback */
994 /* Redefine when we need a different power-on sequence on the same chipset. */
1011 * Indicate if a clock source is connected to low speed external (LSE) specific
1029 /* Support firmware long press power-off timer */
1032 /* Support PMIC power control */
1158 * Store a panic log and halt the system for a software-related reasons, such as
1168 * wish to use chip-implemented panic backup/restore functions.
1241 /* Include AP RO verification support. */
1245 * Enable EC-CR50 communication (a.k.a. EC-EFS2). This is for CR50 config only.
1250 * Version of EC-EFS: 0 (for 2.0) or 1 (for 2.1).
1259 * EC-3PO interactive console in the util directory! Otherwise, you won't be
1264 /* Include CRC-8 utility function */
1270 * build.mk files by adding the objects to the custom-ro_objs-y variable.
1310 * When enabled build support for SHA-384/512, requires CONFIG_DCRYPTO or
1316 * Make sw version of SHA2-512/384 equal to hw(dcrypto).
1317 * Unlike SHA2-256, dcrypto implementation of SHA2-512/384 allows to save
1385 * exception. Supported on cortex-m.
1443 /* Include code for handling external power */
1446 /* Support detecting external power presence via a GPIO */
1449 /* Default debounce time for external power signal */
1462 /* Support fan control while in low-power idle */
1466 * Fans have non-const configuration.
1471 * Replace the default fan_percent_to_rpm() function with a board-specific
1486 /* This enables console commands and higher-level features */
1488 /* This enables chip-specific access functions */
1509 * (eXecute-In-Place) semantics. i.e. code is being fetched directly from
1522 * Base address of memory-mapped flash storage, for platforms which define
1544 * disabling the protect-RO-at-boot flag without rewriting the RO firmware,
1548 * image itself. This is more space-efficient, but the only way to clear the
1566 * Use Read-out protection status as PSTATE, i.e. after RDP is enabled, we never
1569 * This is used when we want to prevent read-back of some critical region (e.g.
1651 * Read-only / read-write image configuration.
1672 * NPCX-specific bootheader geometry.
1721 * Valid values are >= 0, <= INT32_MAX (positive, 32-bit signed integer).
1767 * Double tap works by looking for two isolated Z-axis accelerometer impulses
1789 * Sigmo state machine looks for movement, waits skip milli-seconds,
1790 * and check for movement again with proof milli-seconds.
1797 * Delay between power on and configuring GPIOs.
1798 * On power-on of some boards, H1 releases the EC from reset but then
1800 * EC sees 2 resets: (1) power-on reset, (2) reset-pin reset. If we add
1830 * resume event. Sensor power rails may be powered up or down asynchronously
1871 * may return an in-progress result code for slow commands such as flash
1882 /* Config option to support 64-bit hostevents and wake-masks. */
1892 * Host command parameters and response are 32-bit aligned. This generates
1986 * Use to define going in to hibernate early if low on battery.
1987 * CONFIG_HIBERNATE_BATT_PCT specifies the low battery threshold
1989 * the minimum amount of time to stay in G3 before checking for low
1999 * If defined, chip hibernation is used. Your board needs to define wake-up
2020 * power states so the power rail for those sensors is completely disabled.
2039 * If defined, makes i2c_xfer callback into board-provided functions before the
2041 * to implement any I2C device specific quirks e.g. requiring minimum bus-free
2063 * transaction is done, the pin is set back to low.
2073 * host packet buffer size.
2078 * I2C multi-port controller.
2080 * If CONFIG_I2C_MULTI_PORT_CONTROLLER is defined, a single on-chip I2C
2088 * Packet error checking support for SMBus.
2092 * - write operation appends an error checking byte at end of transfer, and
2093 * - read operatoin verifies the correctness of error checking byte from the
2104 /* EC support Inter-Processor Interrupt. */
2120 /* Current/Power monitor */
2156 * The IT8320 supports e-flash clock up to 48 MHz (IT8390 maximum is 32 MHz).
2157 * Enable it if we want better performance of fetching instruction from e-flash.
2169 * Un-define this flag by default for all real platforms. see (b/129908668)
2180 * column 2. To save power in low-power modes, some Silego variants require
2181 * the signal to be inverted so that the open-drain output from the EC isn't
2182 * costing power due to the pull-up resistor in the Silego.
2201 * scan columns if the power button is held. We must be aware of this case
2217 /* The board uses a negative edge-triggered GPIO for keyboard interrupts. */
2269 * Allow board-specific 8042 keyboard callback when a key state is changed.
2274 * Call board-supplied keyboard_suppress_noise() function when the debounced
2292 * Enable quasi-bidirectional buffers for KSO pins. It has an open-drain output
2293 * and a low-impedance pull-up. The low-impedance pull-up is active when ec
2295 * low-to-high transition time.
2305 * Enable keypad (a palm-sized keyboard section usually placed on the far right)
2316 /* Standard LED behavior according to spec given that we have a red-green
2317 * bicolor led for charging and one power led
2322 * Support common PWM-controlled LEDs that conform to the Chrome OS LED
2360 * Support GPIO-controlled LEDs for common battery/power
2361 * states through a board-defined lookup table.
2372 * Adds a power LED under the control of the board-defined lookup table.
2378 * LEDs for LED_POLICY STD may be inverted. In this case they are active low
2385 #undef CONFIG_LED_DRIVER_DS2413 /* Maxim DS2413, on one-wire interface */
2405 * This is a X-macro composed of a list of LID_OPEN(GPIO_xxx) elements defining
2412 * Support for turning the lightbar power rails on briefly when the AP is off.
2413 * Enabling this requires implementing the board-specific lb_power() function
2425 * Adds a console command for testing the long long shift right ABI on Cortex-m4
2440 * Low power idle options. These are disabled by default and all boards that
2441 * want to use low power idle must define it. When using the LFIOSC, the low
2442 * frequency clock will be used to conserve even more power when possible.
2444 * GPIOs which need to trigger interrupts in low power idle must specify the
2448 * prevent the EC from using low-power idle.
2510 /* Base address of low power RAM. */
2513 /* Size of low power RAM. */
2516 /* Use Link-Time Optimizations to try to reduce the firmware code size */
2546 /* Minute-IA watchdog timer vector number. */
2607 /* Support one-wire interface */
2633 * A feature which exchanges a low entropy secret with rate limits for a high
2645 * Enable hard-resetting the PMU from the EC. The implementation is rather
2674 /* Config for power states and port80 message to be displayed on 7 -segment */
2677 /* Compile common code to support power button debouncing */
2680 /* Force the active state of the power button : 0(default if unset) or 1 */
2683 /* Allow the power button to send events while the lid is closed */
2686 /* Support sending the power button signal to x86 chipsets */
2689 /* Set power button state idle at init. Implemented only for npcx. */
2692 /* Timeout before power button task gives up starting system */
2695 /* Compile common code for AP power state machine */
2698 /* Enable a task-safe way to control the PP5000 rail. */
2705 * Detect power signal interrupt storms, defined as more than
2707 * power signal interrupt within one second.
2721 * Allow the host to self-report its sleep state, in case there is some delay
2722 * between the host beginning to enter the sleep state and power signals
2728 * Implement the '%li' printf format as a *32-bit* integer format,
2729 * as it might be expected by non-EC code.
2734 * On x86 systems, define this option if the CPU_PROCHOT signal is active low.
2798 /* Support RMA auth challenge-response */
2802 * Use the p256 curve for RMA challenge-response calculations (x21559 is used
2807 /* Support verifying 2048-bit RSA signature */
2817 * Adjust the compiler optimization flags for the RSA code to get a speed-up
2829 * When RWSIG verification is performed as a task, time to wait from signature
2830 * verification to an automatic jump to RW (if AP does not request the wait to
2877 /* Support computing SHA-1 hash */
2895 * https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704279
2898 * https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/452459/
2964 /* Maximum Serial NOR flash write size, in Bytes. Note this must be a power of
2983 /* SPI controller halfduplex/3-wire mode */
2990 * Support SPI controller's without GPIO-specified Chip Selects, instead rely on
3004 /* Use 32-bit timer for clock source on stm32. */
3052 * as the means for determining the state of the flipped-360-degree mode.
3079 * - MIA_TASK_FLAG_USE_FPU : bit 0, task uses FPU H/W
3117 * This should contain a flat list of MOCK(the-mock-name) elements.
3163 * If defined, active-high GPIO which indicates temperature sensor chips are
3203 * e.g. clamshell v/s 360-degree flipped mode or base detached v/s attached
3227 /* Set I2C port and address (7-bit) */
3244 /* TPM-like configuration */
3291 * UART receive buffer size in bytes. Must be a power of 2 for macros in
3309 * UART transmit buffer size in bytes. Must be a power of 2 for macros in
3331 /* Include all USB Power Delivery modules */
3364 * Define if this board can enable VBUS discharge (eg. through a GPIO-controlled
3371 /* Define if discharge circuit is EC GPIO-controlled. */
3380 /* Define if this board can act as a dual-role PD port (source and sink) */
3383 /* Define if this board can used TCPC-controlled DRP toggle */
3393 * Define if VBUS source GPIOs (GPIO_USB_C*_5V_EN) are active-low (and named
3394 * (..._L) rather than default active-high.
3413 /* Check whether PD is the sole power source before flash erase operation */
3416 /* Define if this board, operating as a sink, can give power back to a source */
3439 /* Save power by waking up on VBUS rather than polling CC */
3442 /* Allow chip to go into low power idle even when a PD device is attached */
3448 /* Simple DFP, such as power adapter, will not send discovery VDM on connect */
3454 /* Use TCPC module (type-C port controller) */
3457 /* Enable TCPC to enter low power mode */
3460 /* Enable the encoding of msg SOP* in bits 31-28 of 32-bit msg header type */
3473 * Choose one of the following TCPMs (type-C port manager) to manage TCPC. The
3493 * Type-C retimer mux configuration tends to be set on a specific
3502 * Type-C retimer drivers to be used.
3525 * 18h CONFIG_STANDARD_OUTPUT to steer the high-speed muxes.
3534 * - Some TCPCs can detect and report the presence of VBUS.
3535 * - In some configurations, charger ICs can report the presence of VBUS.
3536 * - On some boards, dedicated VBUS interrupt pins are available.
3537 * - Some power path controllers (PPC) can report the presence of VBUS.
3548 /* Define if the there is a separate ADC channel for each USB-C Vbus voltage */
3554 /* Define the type-c port controller I2C base address. */
3565 * sink (and risk a hard reset, losing Vbus). Note this may cause a high-power
3566 * charger to appear as only a low-power 15W charger until a reset is sent to
3567 * re-start PD negotiation.
3577 /* Type-C VCONN Powered Device */
3580 /* Type-C Charge Through VCONN Powered Device */
3583 /* Type-C DRP with Accessory and Try.SRC */
3586 /* Type-C Fast Role Swap */
3603 * Disable charging from Default(USB) Rp as a type-c supplier. If your device
3609 /* USB Type-C Power Path Controllers (PPC) */
3625 /* Support for USB type-c superspeed mux */
3629 * Only configure USB type-c superspeed mux when DFP (for chipsets that
3634 /* Support v1.1 type-C connection state machine */
3637 /* Support for USB type-c vconn. Not needed for captive cables. */
3650 * Used during generation of VIF for USB Type-C Compliance Testing.
3657 * Used during generation of VIF for USB Type-C Compliance Testing.
3742 /* Support simple control of power to the device's USB ports */
3746 * Support smart power control to the device's USB ports, using
3747 * dedicated power control chips. This potentially enables automatic
3748 * negotiation of supplying more power to peripherals.
3753 * Support smart power control to the device's USB ports, however only CDP and
3755 * charging port controller are hard-wired.
3760 * Override the default charging mode for USB smart power control.
3766 * Smart USB power control can use a full set of control signals to the USB
3767 * port power chip, or a reduced set. If this is defined, use the reduced set.
3771 /* Number of smart USB power ports. */
3775 * Smart USB power control current limit pins may be inverted. In this case
3776 * they are active low and the GPIO names will be GPIO_USBn_ILIM_SEL_L.
3781 * Support waking up host by setting the K-state on the data lines (requires
3795 /* Support correct handling of USB suspend (host-initiated). */
3798 /* Default pull-up value on the USB-C ports when they are used as source. */
3801 * Override the pull-up value when only zero or one port is actively sourcing
3810 * USB-C ports
3814 * that there is no current drop (e.g. 3A -> 1.5A) on active source ports.
3830 /* Support the ITE IT5205 Type-C USB alternate mode mux. */
3836 /* Support the Parade PS8740 Type-C Redriving Switch */
3839 /* Support the Parade PS8743 Type-C Redriving Switch */
3864 /* USB Power monitoring interface config */
3891 * if the hook task (which is the lowest-priority task on the system) gets
3906 * chip-dependent corrective action).
3917 #define CONFIG_AUX_TIMER_PERIOD_MS (CONFIG_WATCHDOG_PERIOD_MS - 500)
3934 * Support controlling power to WiFi, WWAN (3G/LTE), and/or bluetooth modules.
3945 /* WiFi power control signal is active-low. */
3948 /* Support Wake-on-Voice */
3952 * Write protect signal is active-high. If this is defined, there must be a
4013 * This will be automatically defined below if the board supports power
4019 * Define the following if the power state support is required.
4034 * Define the following in order to perform power management reset
4056 * On Intel devices EC's USB-C port numbers may not be physically equal to
4060 * USB-C port of EC. Hence, to configure the Intel Virtual MUX, information of
4061 * USB3 and USB2 port numbers of the respective USB-C port is needed.
4073 * per-board basis as needed.
4086 * Define CONFIG_HOST_ESPI_VW_POWER_SIGNAL if any power signals from the host
4125 /* Assume one RAM bank if not specified, auto-compute number of banks */
4165 * Disable the built-in console history if using the experimental console.
4167 * The experimental console keeps its own session-persistent history which
4238 /* Define CONFIG_USBC_PPC if board has a USB Type-C Power Path Controller. */
4264 * Define CONFIG_CHARGER_NARROW_VDC for chargers that use a Narrow VDC power
4323 * anti-rollback block.
4331 * Handle task-dependent configs.
4333 * This prevent sub-modules from being compiled when the task and parent module
4356 * If a board has a chipset task, set the minimum charger power required for
4357 * powering on to 15W. This is also the highest power discovered over Type-C by
4359 * system is locked and in RO, so it would not be able to tell if higher power
4361 * charger does speak USB PD and we would be able to negotiate more power after
4364 * If a board needs more or less power to power on, they can re-define this
4396 * cell-undervoltage brownout during startup increases. Raising this term and
4472 * override some of the config flags in non-standard ways to mock only parts of
4551 /* ISH power management related definitions */
4556 #error "Must define CONFIG_LOW_POWER_IDLE if enable ISH low power states"
4587 /* EC Codec Wake-on-Voice related definitions */
4596 /* Don't run RSA 2048 known-answer test (+30 ms). */
4598 /* Don't run software HMAC_DRBG-SHA256 known-answer test (+30 ms). */
4602 /* Don't use ECDSA pair-wise consistency test. We verify sign/verify. */