Lines Matching +full:- +full:- +full:batch
52 batch_round_upto(struct intel_batchbuffer *batch, uint32_t divisor) in batch_round_upto() argument
54 uint32_t offset = batch->ptr - batch->buffer; in batch_round_upto()
56 offset = (offset + divisor-1) / divisor * divisor; in batch_round_upto()
57 batch->ptr = batch->buffer + offset; in batch_round_upto()
62 gen6_render_flush(struct intel_batchbuffer *batch, in gen6_render_flush() argument
67 ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); in gen6_render_flush()
69 ret = drm_intel_gem_bo_context_exec(batch->bo, context, in gen6_render_flush()
75 gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, in gen6_bind_buf() argument
82 igt_assert_lte(buf->stride, 128*1024); in gen6_bind_buf()
93 ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 32); in gen6_bind_buf()
94 ss->ss0.surface_type = SURFACE_2D; in gen6_bind_buf()
96 switch (buf->bpp) { in gen6_bind_buf()
97 case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break; in gen6_bind_buf()
98 case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break; in gen6_bind_buf()
99 case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break; in gen6_bind_buf()
100 case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break; in gen6_bind_buf()
104 ss->ss0.data_return_format = SURFACERETURNFORMAT_FLOAT32; in gen6_bind_buf()
105 ss->ss0.color_blend = 1; in gen6_bind_buf()
106 ss->ss1.base_addr = buf->bo->offset; in gen6_bind_buf()
108 ret = drm_intel_bo_emit_reloc(batch->bo, in gen6_bind_buf()
109 intel_batchbuffer_subdata_offset(batch, &ss->ss1), in gen6_bind_buf()
110 buf->bo, 0, in gen6_bind_buf()
114 ss->ss2.height = igt_buf_height(buf) - 1; in gen6_bind_buf()
115 ss->ss2.width = igt_buf_width(buf) - 1; in gen6_bind_buf()
116 ss->ss3.pitch = buf->stride - 1; in gen6_bind_buf()
117 ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE; in gen6_bind_buf()
118 ss->ss3.tile_walk = buf->tiling == I915_TILING_Y; in gen6_bind_buf()
120 ss->ss5.memory_object_control = GEN6_MOCS_PTE; in gen6_bind_buf()
122 return intel_batchbuffer_subdata_offset(batch, ss); in gen6_bind_buf()
126 gen6_bind_surfaces(struct intel_batchbuffer *batch, in gen6_bind_surfaces() argument
132 binding_table = intel_batchbuffer_subdata_alloc(batch, 32, 32); in gen6_bind_surfaces()
134 binding_table[0] = gen6_bind_buf(batch, dst, 1); in gen6_bind_surfaces()
135 binding_table[1] = gen6_bind_buf(batch, src, 0); in gen6_bind_surfaces()
137 return intel_batchbuffer_subdata_offset(batch, binding_table); in gen6_bind_surfaces()
141 gen6_emit_sip(struct intel_batchbuffer *batch) in gen6_emit_sip() argument
148 gen6_emit_urb(struct intel_batchbuffer *batch) in gen6_emit_urb() argument
150 OUT_BATCH(GEN6_3DSTATE_URB | (3 - 2)); in gen6_emit_urb()
151 OUT_BATCH((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT | in gen6_emit_urb()
158 gen6_emit_state_base_address(struct intel_batchbuffer *batch) in gen6_emit_state_base_address() argument
160 OUT_BATCH(GEN4_STATE_BASE_ADDRESS | (10 - 2)); in gen6_emit_state_base_address()
162 OUT_RELOC(batch->bo, /* surface */ in gen6_emit_state_base_address()
165 OUT_RELOC(batch->bo, /* instruction */ in gen6_emit_state_base_address()
169 OUT_RELOC(batch->bo, /* dynamic */ in gen6_emit_state_base_address()
181 gen6_emit_viewports(struct intel_batchbuffer *batch, uint32_t cc_vp) in gen6_emit_viewports() argument
185 (4 - 2)); in gen6_emit_viewports()
192 gen6_emit_vs(struct intel_batchbuffer *batch) in gen6_emit_vs() argument
195 OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (5 - 2)); in gen6_emit_vs()
201 OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2)); in gen6_emit_vs()
206 OUT_BATCH(0); /* pass-through */ in gen6_emit_vs()
210 gen6_emit_gs(struct intel_batchbuffer *batch) in gen6_emit_gs() argument
213 OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (5 - 2)); in gen6_emit_gs()
219 OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2)); in gen6_emit_gs()
225 OUT_BATCH(0); /* pass-through */ in gen6_emit_gs()
229 gen6_emit_clip(struct intel_batchbuffer *batch) in gen6_emit_clip() argument
231 OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); in gen6_emit_clip()
233 OUT_BATCH(0); /* pass-through */ in gen6_emit_clip()
238 gen6_emit_wm_constants(struct intel_batchbuffer *batch) in gen6_emit_wm_constants() argument
241 OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (5 - 2)); in gen6_emit_wm_constants()
249 gen6_emit_null_depth_buffer(struct intel_batchbuffer *batch) in gen6_emit_null_depth_buffer() argument
251 OUT_BATCH(GEN4_3DSTATE_DEPTH_BUFFER | (7 - 2)); in gen6_emit_null_depth_buffer()
260 OUT_BATCH(GEN4_3DSTATE_CLEAR_PARAMS | (2 - 2)); in gen6_emit_null_depth_buffer()
265 gen6_emit_invariant(struct intel_batchbuffer *batch) in gen6_emit_invariant() argument
269 OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (3 - 2)); in gen6_emit_invariant()
274 OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); in gen6_emit_invariant()
279 gen6_emit_cc(struct intel_batchbuffer *batch, uint32_t blend) in gen6_emit_cc() argument
281 OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2)); in gen6_emit_cc()
288 gen6_emit_sampler(struct intel_batchbuffer *batch, uint32_t state) in gen6_emit_sampler() argument
292 (4 - 2)); in gen6_emit_sampler()
299 gen6_emit_sf(struct intel_batchbuffer *batch) in gen6_emit_sf() argument
301 OUT_BATCH(GEN6_3DSTATE_SF | (20 - 2)); in gen6_emit_sf()
326 gen6_emit_wm(struct intel_batchbuffer *batch, int kernel) in gen6_emit_wm() argument
328 OUT_BATCH(GEN6_3DSTATE_WM | (9 - 2)); in gen6_emit_wm()
334 OUT_BATCH((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT | in gen6_emit_wm()
344 gen6_emit_binding_table(struct intel_batchbuffer *batch, uint32_t wm_table) in gen6_emit_binding_table() argument
348 (4 - 2)); in gen6_emit_binding_table()
355 gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, const struct igt_buf *dst) in gen6_emit_drawing_rectangle() argument
357 OUT_BATCH(GEN4_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); in gen6_emit_drawing_rectangle()
359 OUT_BATCH((igt_buf_height(dst) - 1) << 16 | (igt_buf_width(dst) - 1)); in gen6_emit_drawing_rectangle()
364 gen6_emit_vertex_elements(struct intel_batchbuffer *batch) in gen6_emit_vertex_elements() argument
367 * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) in gen6_emit_vertex_elements()
368 * dword 4-7: position (x, y, 1.0, 1.0), in gen6_emit_vertex_elements()
369 * dword 8-11: texture coordinate 0 (u0, v0, 0, 0) in gen6_emit_vertex_elements()
371 * dword 4-11 are fetched from vertex buffer in gen6_emit_vertex_elements()
373 OUT_BATCH(GEN4_3DSTATE_VERTEX_ELEMENTS | (2 * 3 + 1 - 2)); in gen6_emit_vertex_elements()
403 gen6_create_cc_viewport(struct intel_batchbuffer *batch) in gen6_create_cc_viewport() argument
407 vp = intel_batchbuffer_subdata_alloc(batch, sizeof(*vp), 32); in gen6_create_cc_viewport()
409 vp->min_depth = -1.e35; in gen6_create_cc_viewport()
410 vp->max_depth = 1.e35; in gen6_create_cc_viewport()
412 return intel_batchbuffer_subdata_offset(batch, vp); in gen6_create_cc_viewport()
416 gen6_create_cc_blend(struct intel_batchbuffer *batch) in gen6_create_cc_blend() argument
420 blend = intel_batchbuffer_subdata_alloc(batch, sizeof(*blend), 64); in gen6_create_cc_blend()
422 blend->blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO; in gen6_create_cc_blend()
423 blend->blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE; in gen6_create_cc_blend()
424 blend->blend0.blend_func = GEN6_BLENDFUNCTION_ADD; in gen6_create_cc_blend()
425 blend->blend0.blend_enable = 1; in gen6_create_cc_blend()
427 blend->blend1.post_blend_clamp_enable = 1; in gen6_create_cc_blend()
428 blend->blend1.pre_blend_clamp_enable = 1; in gen6_create_cc_blend()
430 return intel_batchbuffer_subdata_offset(batch, blend); in gen6_create_cc_blend()
434 gen6_create_kernel(struct intel_batchbuffer *batch) in gen6_create_kernel() argument
436 return intel_batchbuffer_copy_data(batch, ps_kernel_nomask_affine, in gen6_create_kernel()
442 gen6_create_sampler(struct intel_batchbuffer *batch, in gen6_create_sampler() argument
448 ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 32); in gen6_create_sampler()
449 ss->ss0.lod_preclamp = 1; /* GL mode */ in gen6_create_sampler()
453 ss->ss0.border_color_mode = GEN4_BORDER_COLOR_MODE_LEGACY; in gen6_create_sampler()
458 ss->ss0.min_filter = GEN4_MAPFILTER_NEAREST; in gen6_create_sampler()
459 ss->ss0.mag_filter = GEN4_MAPFILTER_NEAREST; in gen6_create_sampler()
462 ss->ss0.min_filter = GEN4_MAPFILTER_LINEAR; in gen6_create_sampler()
463 ss->ss0.mag_filter = GEN4_MAPFILTER_LINEAR; in gen6_create_sampler()
470 ss->ss1.r_wrap_mode = GEN4_TEXCOORDMODE_CLAMP_BORDER; in gen6_create_sampler()
471 ss->ss1.s_wrap_mode = GEN4_TEXCOORDMODE_CLAMP_BORDER; in gen6_create_sampler()
472 ss->ss1.t_wrap_mode = GEN4_TEXCOORDMODE_CLAMP_BORDER; in gen6_create_sampler()
475 ss->ss1.r_wrap_mode = GEN4_TEXCOORDMODE_WRAP; in gen6_create_sampler()
476 ss->ss1.s_wrap_mode = GEN4_TEXCOORDMODE_WRAP; in gen6_create_sampler()
477 ss->ss1.t_wrap_mode = GEN4_TEXCOORDMODE_WRAP; in gen6_create_sampler()
480 ss->ss1.r_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; in gen6_create_sampler()
481 ss->ss1.s_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; in gen6_create_sampler()
482 ss->ss1.t_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; in gen6_create_sampler()
485 ss->ss1.r_wrap_mode = GEN4_TEXCOORDMODE_MIRROR; in gen6_create_sampler()
486 ss->ss1.s_wrap_mode = GEN4_TEXCOORDMODE_MIRROR; in gen6_create_sampler()
487 ss->ss1.t_wrap_mode = GEN4_TEXCOORDMODE_MIRROR; in gen6_create_sampler()
491 return intel_batchbuffer_subdata_offset(batch, ss); in gen6_create_sampler()
494 static void gen6_emit_vertex_buffer(struct intel_batchbuffer *batch) in gen6_emit_vertex_buffer() argument
500 OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, 0); in gen6_emit_vertex_buffer()
501 OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, batch->bo->size-1); in gen6_emit_vertex_buffer()
505 static uint32_t gen6_emit_primitive(struct intel_batchbuffer *batch) in gen6_emit_primitive() argument
515 offset = batch->ptr - batch->buffer; in gen6_emit_primitive()
524 void gen6_render_copyfunc(struct intel_batchbuffer *batch, in gen6_render_copyfunc() argument
534 igt_assert(src->bpp == dst->bpp); in gen6_render_copyfunc()
535 intel_batchbuffer_flush_with_context(batch, context); in gen6_render_copyfunc()
537 batch->ptr = batch->buffer + 1024; in gen6_render_copyfunc()
538 intel_batchbuffer_subdata_alloc(batch, 64, 64); in gen6_render_copyfunc()
539 wm_table = gen6_bind_surfaces(batch, src, dst); in gen6_render_copyfunc()
540 wm_kernel = gen6_create_kernel(batch); in gen6_render_copyfunc()
541 wm_state = gen6_create_sampler(batch, in gen6_render_copyfunc()
545 cc_vp = gen6_create_cc_viewport(batch); in gen6_render_copyfunc()
546 cc_blend = gen6_create_cc_blend(batch); in gen6_render_copyfunc()
548 batch->ptr = batch->buffer; in gen6_render_copyfunc()
550 gen6_emit_invariant(batch); in gen6_render_copyfunc()
551 gen6_emit_state_base_address(batch); in gen6_render_copyfunc()
553 gen6_emit_sip(batch); in gen6_render_copyfunc()
554 gen6_emit_urb(batch); in gen6_render_copyfunc()
556 gen6_emit_viewports(batch, cc_vp); in gen6_render_copyfunc()
557 gen6_emit_vs(batch); in gen6_render_copyfunc()
558 gen6_emit_gs(batch); in gen6_render_copyfunc()
559 gen6_emit_clip(batch); in gen6_render_copyfunc()
560 gen6_emit_wm_constants(batch); in gen6_render_copyfunc()
561 gen6_emit_null_depth_buffer(batch); in gen6_render_copyfunc()
563 gen6_emit_drawing_rectangle(batch, dst); in gen6_render_copyfunc()
564 gen6_emit_cc(batch, cc_blend); in gen6_render_copyfunc()
565 gen6_emit_sampler(batch, wm_state); in gen6_render_copyfunc()
566 gen6_emit_sf(batch); in gen6_render_copyfunc()
567 gen6_emit_wm(batch, wm_kernel); in gen6_render_copyfunc()
568 gen6_emit_vertex_elements(batch); in gen6_render_copyfunc()
569 gen6_emit_binding_table(batch, wm_table); in gen6_render_copyfunc()
571 gen6_emit_vertex_buffer(batch); in gen6_render_copyfunc()
572 offset = gen6_emit_primitive(batch); in gen6_render_copyfunc()
575 batch_end = intel_batchbuffer_align(batch, 8); in gen6_render_copyfunc()
577 *(uint32_t*)(batch->buffer + offset) = in gen6_render_copyfunc()
578 batch_round_upto(batch, VERTEX_SIZE)/VERTEX_SIZE; in gen6_render_copyfunc()
580 emit_vertex_2s(batch, dst_x + width, dst_y + height); in gen6_render_copyfunc()
581 emit_vertex_normalized(batch, src_x + width, igt_buf_width(src)); in gen6_render_copyfunc()
582 emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); in gen6_render_copyfunc()
584 emit_vertex_2s(batch, dst_x, dst_y + height); in gen6_render_copyfunc()
585 emit_vertex_normalized(batch, src_x, igt_buf_width(src)); in gen6_render_copyfunc()
586 emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); in gen6_render_copyfunc()
588 emit_vertex_2s(batch, dst_x, dst_y); in gen6_render_copyfunc()
589 emit_vertex_normalized(batch, src_x, igt_buf_width(src)); in gen6_render_copyfunc()
590 emit_vertex_normalized(batch, src_y, igt_buf_height(src)); in gen6_render_copyfunc()
592 gen6_render_flush(batch, context, batch_end); in gen6_render_copyfunc()
593 intel_batchbuffer_reset(batch); in gen6_render_copyfunc()