Lines Matching +full:- +full:- +full:batch
36 gen7_render_flush(struct intel_batchbuffer *batch, in gen7_render_flush() argument
41 ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); in gen7_render_flush()
43 ret = drm_intel_gem_bo_context_exec(batch->bo, context, in gen7_render_flush()
60 gen7_bind_buf(struct intel_batchbuffer *batch, in gen7_bind_buf() argument
68 igt_assert_lte(buf->stride, 256*1024); in gen7_bind_buf()
72 switch (buf->bpp) { in gen7_bind_buf()
87 ss = intel_batchbuffer_subdata_alloc(batch, 8 * sizeof(*ss), 32); in gen7_bind_buf()
90 gen7_tiling_bits(buf->tiling) | in gen7_bind_buf()
92 ss[1] = buf->bo->offset; in gen7_bind_buf()
93 ss[2] = ((igt_buf_width(buf) - 1) << GEN7_SURFACE_WIDTH_SHIFT | in gen7_bind_buf()
94 (igt_buf_height(buf) - 1) << GEN7_SURFACE_HEIGHT_SHIFT); in gen7_bind_buf()
95 ss[3] = (buf->stride - 1) << GEN7_SURFACE_PITCH_SHIFT; in gen7_bind_buf()
97 if (IS_VALLEYVIEW(batch->devid)) in gen7_bind_buf()
103 if (IS_HASWELL(batch->devid)) in gen7_bind_buf()
106 ret = drm_intel_bo_emit_reloc(batch->bo, in gen7_bind_buf()
107 intel_batchbuffer_subdata_offset(batch, &ss[1]), in gen7_bind_buf()
108 buf->bo, 0, in gen7_bind_buf()
112 return intel_batchbuffer_subdata_offset(batch, ss); in gen7_bind_buf()
116 gen7_emit_vertex_elements(struct intel_batchbuffer *batch) in gen7_emit_vertex_elements() argument
119 ((2 * (1 + 2)) + 1 - 2)); in gen7_emit_vertex_elements()
150 gen7_create_vertex_buffer(struct intel_batchbuffer *batch, in gen7_create_vertex_buffer() argument
157 v = intel_batchbuffer_subdata_alloc(batch, 12 * sizeof(*v), 8); in gen7_create_vertex_buffer()
174 return intel_batchbuffer_subdata_offset(batch, v); in gen7_create_vertex_buffer()
177 static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch, in gen7_emit_vertex_buffer() argument
183 OUT_BATCH(GEN4_3DSTATE_VERTEX_BUFFERS | (5 - 2)); in gen7_emit_vertex_buffer()
189 OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, offset); in gen7_emit_vertex_buffer()
195 gen7_bind_surfaces(struct intel_batchbuffer *batch, in gen7_bind_surfaces() argument
201 binding_table = intel_batchbuffer_subdata_alloc(batch, 8, 32); in gen7_bind_surfaces()
203 binding_table[0] = gen7_bind_buf(batch, dst, 1); in gen7_bind_surfaces()
204 binding_table[1] = gen7_bind_buf(batch, src, 0); in gen7_bind_surfaces()
206 return intel_batchbuffer_subdata_offset(batch, binding_table); in gen7_bind_surfaces()
210 gen7_emit_binding_table(struct intel_batchbuffer *batch, in gen7_emit_binding_table() argument
215 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); in gen7_emit_binding_table()
220 gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch, const struct igt_buf *dst) in gen7_emit_drawing_rectangle() argument
222 OUT_BATCH(GEN4_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); in gen7_emit_drawing_rectangle()
224 OUT_BATCH((igt_buf_height(dst) - 1) << 16 | (igt_buf_width(dst) - 1)); in gen7_emit_drawing_rectangle()
229 gen7_create_blend_state(struct intel_batchbuffer *batch) in gen7_create_blend_state() argument
233 blend = intel_batchbuffer_subdata_alloc(batch, sizeof(*blend), 64); in gen7_create_blend_state()
235 blend->blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO; in gen7_create_blend_state()
236 blend->blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE; in gen7_create_blend_state()
237 blend->blend0.blend_func = GEN6_BLENDFUNCTION_ADD; in gen7_create_blend_state()
238 blend->blend1.post_blend_clamp_enable = 1; in gen7_create_blend_state()
239 blend->blend1.pre_blend_clamp_enable = 1; in gen7_create_blend_state()
241 return intel_batchbuffer_subdata_offset(batch, blend); in gen7_create_blend_state()
245 gen7_emit_state_base_address(struct intel_batchbuffer *batch) in gen7_emit_state_base_address() argument
247 OUT_BATCH(GEN4_STATE_BASE_ADDRESS | (10 - 2)); in gen7_emit_state_base_address()
249 OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen7_emit_state_base_address()
250 OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen7_emit_state_base_address()
252 OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); in gen7_emit_state_base_address()
261 gen7_create_cc_viewport(struct intel_batchbuffer *batch) in gen7_create_cc_viewport() argument
265 vp = intel_batchbuffer_subdata_alloc(batch, sizeof(*vp), 32); in gen7_create_cc_viewport()
266 vp->min_depth = -1.e35; in gen7_create_cc_viewport()
267 vp->max_depth = 1.e35; in gen7_create_cc_viewport()
269 return intel_batchbuffer_subdata_offset(batch, vp); in gen7_create_cc_viewport()
273 gen7_emit_cc(struct intel_batchbuffer *batch, uint32_t blend_state, in gen7_emit_cc() argument
276 OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); in gen7_emit_cc()
279 OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); in gen7_emit_cc()
284 gen7_create_sampler(struct intel_batchbuffer *batch) in gen7_create_sampler() argument
288 ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 32); in gen7_create_sampler()
290 ss->ss0.min_filter = GEN4_MAPFILTER_NEAREST; in gen7_create_sampler()
291 ss->ss0.mag_filter = GEN4_MAPFILTER_NEAREST; in gen7_create_sampler()
293 ss->ss3.r_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; in gen7_create_sampler()
294 ss->ss3.s_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; in gen7_create_sampler()
295 ss->ss3.t_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; in gen7_create_sampler()
297 ss->ss3.non_normalized_coord = 1; in gen7_create_sampler()
299 return intel_batchbuffer_subdata_offset(batch, ss); in gen7_create_sampler()
303 gen7_emit_sampler(struct intel_batchbuffer *batch, uint32_t sampler_off) in gen7_emit_sampler() argument
305 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); in gen7_emit_sampler()
310 gen7_emit_multisample(struct intel_batchbuffer *batch) in gen7_emit_multisample() argument
312 OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (4 - 2)); in gen7_emit_multisample()
318 OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); in gen7_emit_multisample()
323 gen7_emit_urb(struct intel_batchbuffer *batch) in gen7_emit_urb() argument
325 OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); in gen7_emit_urb()
329 OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2)); in gen7_emit_urb()
331 (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | in gen7_emit_urb()
334 OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2)); in gen7_emit_urb()
338 OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2)); in gen7_emit_urb()
342 OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2)); in gen7_emit_urb()
348 gen7_emit_vs(struct intel_batchbuffer *batch) in gen7_emit_vs() argument
350 OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2)); in gen7_emit_vs()
355 OUT_BATCH(0); /* pass-through */ in gen7_emit_vs()
359 gen7_emit_hs(struct intel_batchbuffer *batch) in gen7_emit_hs() argument
361 OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2)); in gen7_emit_hs()
367 OUT_BATCH(0); /* pass-through */ in gen7_emit_hs()
371 gen7_emit_te(struct intel_batchbuffer *batch) in gen7_emit_te() argument
373 OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2)); in gen7_emit_te()
380 gen7_emit_ds(struct intel_batchbuffer *batch) in gen7_emit_ds() argument
382 OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2)); in gen7_emit_ds()
391 gen7_emit_gs(struct intel_batchbuffer *batch) in gen7_emit_gs() argument
393 OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2)); in gen7_emit_gs()
399 OUT_BATCH(0); /* pass-through */ in gen7_emit_gs()
403 gen7_emit_streamout(struct intel_batchbuffer *batch) in gen7_emit_streamout() argument
405 OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2)); in gen7_emit_streamout()
411 gen7_emit_sf(struct intel_batchbuffer *batch) in gen7_emit_sf() argument
413 OUT_BATCH(GEN6_3DSTATE_SF | (7 - 2)); in gen7_emit_sf()
423 gen7_emit_sbe(struct intel_batchbuffer *batch) in gen7_emit_sbe() argument
425 OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2)); in gen7_emit_sbe()
444 gen7_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel_off) in gen7_emit_ps() argument
448 if (IS_HASWELL(batch->devid)) in gen7_emit_ps()
453 OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2)); in gen7_emit_ps()
467 gen7_emit_clip(struct intel_batchbuffer *batch) in gen7_emit_clip() argument
469 OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); in gen7_emit_clip()
471 OUT_BATCH(0); /* pass-through */ in gen7_emit_clip()
474 OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); in gen7_emit_clip()
479 gen7_emit_wm(struct intel_batchbuffer *batch) in gen7_emit_wm() argument
481 OUT_BATCH(GEN6_3DSTATE_WM | (3 - 2)); in gen7_emit_wm()
488 gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch) in gen7_emit_null_depth_buffer() argument
490 OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); in gen7_emit_null_depth_buffer()
499 OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); in gen7_emit_null_depth_buffer()
505 void gen7_render_copyfunc(struct intel_batchbuffer *batch, in gen7_render_copyfunc() argument
516 igt_assert(src->bpp == dst->bpp); in gen7_render_copyfunc()
517 intel_batchbuffer_flush_with_context(batch, context); in gen7_render_copyfunc()
519 batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; in gen7_render_copyfunc()
522 blend_state = gen7_create_blend_state(batch); in gen7_render_copyfunc()
523 cc_viewport = gen7_create_cc_viewport(batch); in gen7_render_copyfunc()
524 ps_sampler_off = gen7_create_sampler(batch); in gen7_render_copyfunc()
525 ps_kernel_off = intel_batchbuffer_copy_data(batch, ps_kernel, in gen7_render_copyfunc()
527 vertex_buffer = gen7_create_vertex_buffer(batch, in gen7_render_copyfunc()
531 ps_binding_table = gen7_bind_surfaces(batch, src, dst); in gen7_render_copyfunc()
533 igt_assert(batch->ptr < &batch->buffer[4095]); in gen7_render_copyfunc()
535 batch->ptr = batch->buffer; in gen7_render_copyfunc()
538 gen7_emit_state_base_address(batch); in gen7_render_copyfunc()
539 gen7_emit_multisample(batch); in gen7_render_copyfunc()
540 gen7_emit_urb(batch); in gen7_render_copyfunc()
541 gen7_emit_vs(batch); in gen7_render_copyfunc()
542 gen7_emit_hs(batch); in gen7_render_copyfunc()
543 gen7_emit_te(batch); in gen7_render_copyfunc()
544 gen7_emit_ds(batch); in gen7_render_copyfunc()
545 gen7_emit_gs(batch); in gen7_render_copyfunc()
546 gen7_emit_clip(batch); in gen7_render_copyfunc()
547 gen7_emit_sf(batch); in gen7_render_copyfunc()
548 gen7_emit_wm(batch); in gen7_render_copyfunc()
549 gen7_emit_streamout(batch); in gen7_render_copyfunc()
550 gen7_emit_null_depth_buffer(batch); in gen7_render_copyfunc()
551 gen7_emit_cc(batch, blend_state, cc_viewport); in gen7_render_copyfunc()
552 gen7_emit_sampler(batch, ps_sampler_off); in gen7_render_copyfunc()
553 gen7_emit_sbe(batch); in gen7_render_copyfunc()
554 gen7_emit_ps(batch, ps_kernel_off); in gen7_render_copyfunc()
555 gen7_emit_vertex_elements(batch); in gen7_render_copyfunc()
556 gen7_emit_vertex_buffer(batch, src_x, src_y, in gen7_render_copyfunc()
559 gen7_emit_binding_table(batch, src, dst, ps_binding_table); in gen7_render_copyfunc()
560 gen7_emit_drawing_rectangle(batch, dst); in gen7_render_copyfunc()
562 OUT_BATCH(GEN4_3DPRIMITIVE | (7 - 2)); in gen7_render_copyfunc()
572 batch_end = batch->ptr - batch->buffer; in gen7_render_copyfunc()
576 gen7_render_flush(batch, context, batch_end); in gen7_render_copyfunc()
577 intel_batchbuffer_reset(batch); in gen7_render_copyfunc()