49   StackPtr = TRI->getStackRegister();  in X86FrameLowering()
277         MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)  in emitSPUpdate()
278           .addReg(StackPtr)  in emitSPUpdate()
351                               StackPtr),  in BuildStackAdjustment()
352                       StackPtr, false, Offset);  in BuildStackAdjustment()
358     MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)  in BuildStackAdjustment()
359              .addReg(StackPtr)  in BuildStackAdjustment()
387       PI->getOperand(0).getReg() == StackPtr){  in mergeSPUpdates()
388     assert(PI->getOperand(1).getReg() == StackPtr);  in mergeSPUpdates()
393              PI->getOperand(0).getReg() == StackPtr &&  in mergeSPUpdates()
394              PI->getOperand(1).getReg() == StackPtr &&  in mergeSPUpdates()
404              PI->getOperand(0).getReg() == StackPtr) {  in mergeSPUpdates()
405     assert(PI->getOperand(1).getReg() == StackPtr);  in mergeSPUpdates()
1017     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)  in emitPrologue()
1074           .addReg(StackPtr)  in emitPrologue()
1135     BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);  in emitPrologue()
1202                        StackPtr, false, NumBytes - 4);  in emitPrologue()
1233       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,  in emitPrologue()
1243     SPOrEstablisher = StackPtr;  in emitPrologue()
1316     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,  in emitPrologue()
1318         .addReg(StackPtr)  in emitPrologue()
1608       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),  in emitEpilogue()
1613       BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)  in emitEpilogue()