Lines Matching +full:build +full:- +full:static +full:- +full:dbg
1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 < %s | FileCheck %s --check-prefix=ASM
2 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 < %s -filetype=obj | llvm-readobj -codeview | FileChe…
4 ; This LL file was generated by running 'clang -O1 -g -gcodeview' on the
7 ; 2: static inline void foo() {
13 ; 8: static inline void bar() {
44 ; ASM: .long [[inline_end:.*]]-[[inline_beg:.*]] #
147 ; OBJ-NOT: TypeLeafKind: LF_FUNC_ID
155 ; OBJ: FileID: D:\src\llvm\build\t.cpp (0x0)
160 ; OBJ: FileID: D:\src\llvm\build\t.cpp (0x0)
186 ; OBJ-NEXT: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0x8, LineOffset: 1}
187 ; OBJ-NEXT: ChangeLineOffset: -6
188 ; OBJ-NEXT: ChangeCodeOffset: 0x7
189 ; OBJ-NEXT: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0xA, LineOffset: 1}
190 ; OBJ-NEXT: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0x6, LineOffset: 1}
191 ; OBJ-NEXT: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0x7, LineOffset: 1}
192 ; OBJ-NEXT: ChangeLineOffset: 5
193 ; OBJ-NEXT: ChangeCodeOffset: 0x7
194 ; OBJ-NEXT: ChangeCodeLength: 0x7
202 ; OBJ-NEXT: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0xF, LineOffset: 1}
203 ; OBJ-NEXT: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0xA, LineOffset: 1}
204 ; OBJ-NEXT: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0x6, LineOffset: 1}
205 ; OBJ-NEXT: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0x7, LineOffset: 1}
206 ; OBJ-NEXT: ChangeCodeLength: 0x7
217 target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
218 target triple = "x86_64-pc-windows-msvc18.0.0"
223 define void @"\01?baz@@YAXXZ"() #0 !dbg !4 {
226 %0 = load volatile i32, i32* @"\01?x@@3HC", align 4, !dbg !12, !tbaa !13
227 %add = add nsw i32 %0, 6, !dbg !12
228 store volatile i32 %add, i32* @"\01?x@@3HC", align 4, !dbg !12, !tbaa !13
229 %1 = load volatile i32, i32* @"\01?x@@3HC", align 4, !dbg !17, !tbaa !13
230 %add.i = add nsw i32 %1, 4, !dbg !17
231 store volatile i32 %add.i, i32* @"\01?x@@3HC", align 4, !dbg !17, !tbaa !13
232 %2 = bitcast i32* %y.i.i to i8*, !dbg !19
233 call void @llvm.lifetime.start(i64 4, i8* %2) #2, !dbg !19
234 store i32 1, i32* %y.i.i, align 4, !dbg !21, !tbaa !13
235 %3 = ptrtoint i32* %y.i.i to i64, !dbg !22
236 %4 = trunc i64 %3 to i32, !dbg !22
237 %5 = load volatile i32, i32* @"\01?x@@3HC", align 4, !dbg !23, !tbaa !13
238 %add.i.i = add nsw i32 %5, %4, !dbg !23
239 store volatile i32 %add.i.i, i32* @"\01?x@@3HC", align 4, !dbg !23, !tbaa !13
240 %6 = load volatile i32, i32* @"\01?x@@3HC", align 4, !dbg !24, !tbaa !13
241 %add1.i.i = add nsw i32 %6, 2, !dbg !24
242 store volatile i32 %add1.i.i, i32* @"\01?x@@3HC", align 4, !dbg !24, !tbaa !13
243 %7 = load volatile i32, i32* @"\01?x@@3HC", align 4, !dbg !25, !tbaa !13
244 %add2.i.i = add nsw i32 %7, 3, !dbg !25
245 store volatile i32 %add2.i.i, i32* @"\01?x@@3HC", align 4, !dbg !25, !tbaa !13
246 call void @llvm.lifetime.end(i64 4, i8* %2) #2, !dbg !26
247 %8 = load volatile i32, i32* @"\01?x@@3HC", align 4, !dbg !27, !tbaa !13
248 %add1.i = add nsw i32 %8, 5, !dbg !27
249 store volatile i32 %add1.i, i32* @"\01?x@@3HC", align 4, !dbg !27, !tbaa !13
250 %9 = load volatile i32, i32* @"\01?x@@3HC", align 4, !dbg !28, !tbaa !13
251 %add1 = add nsw i32 %9, 7, !dbg !28
252 store volatile i32 %add1, i32* @"\01?x@@3HC", align 4, !dbg !28, !tbaa !13
253 ret void, !dbg !29
262 …-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math…
266 !llvm.dbg.cu = !{!0}