Lines Matching +full:4 +full:x
3 define <4 x float> @test1(<4 x float> %v1) {
5 ; CHECK: ret <4 x float> %v1
6 %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
7 ret <4 x float> %v2
10 define <4 x float> @test2(<4 x float> %v1) {
12 ; CHECK: ret <4 x float> %v1
13 %v2 = shufflevector <4 x float> %v1, <4 x float> %v1, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
14 ret <4 x float> %v2
17 define float @test3(<4 x float> %A, <4 x float> %B, float %f) {
20 %C = insertelement <4 x float> %A, float %f, i32 0
21 %D = shufflevector <4 x float> %C, <4 x float> %B, <4 x i32> <i32 5, i32 0, i32 2, i32 7>
22 %E = extractelement <4 x float> %D, i32 1
26 define i32 @test4(<4 x i32> %X) {
30 %tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> zeroinitializer
31 %tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
35 define i32 @test5(<4 x i32> %X) {
39 …%tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 undef…
40 %tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
44 define float @test6(<4 x float> %X) {
48 %X1 = bitcast <4 x float> %X to <4 x i32>
49 %tmp152.i53899.i = shufflevector <4 x i32> %X1, <4 x i32> undef, <4 x i32> zeroinitializer
50 %tmp152.i53900.i = bitcast <4 x i32> %tmp152.i53899.i to <4 x float>
51 %tmp34 = extractelement <4 x float> %tmp152.i53900.i, i32 0
55 define <4 x float> @test7(<4 x float> %tmp45.i) {
57 ; CHECK-NEXT: ret <4 x float> %tmp45.i
58 …%tmp1642.i = shufflevector <4 x float> %tmp45.i, <4 x float> undef, <4 x i32> < i32 0, i32 1, i32 …
59 ret <4 x float> %tmp1642.i
63 define <4 x float> @test8(<4 x float> %tmp, <4 x float> %tmp1) {
67 %tmp4 = extractelement <4 x float> %tmp, i32 1
68 %tmp2 = extractelement <4 x float> %tmp, i32 3
69 %tmp1.upgrd.1 = extractelement <4 x float> %tmp1, i32 0
70 %tmp128 = insertelement <4 x float> undef, float %tmp4, i32 0
71 %tmp130 = insertelement <4 x float> %tmp128, float undef, i32 1
72 %tmp132 = insertelement <4 x float> %tmp130, float %tmp2, i32 2
73 %tmp134 = insertelement <4 x float> %tmp132, float %tmp1.upgrd.1, i32 3
74 ret <4 x float> %tmp134
79 define <4 x i8> @test9(<16 x i8> %tmp6) nounwind {
83 …%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 13, i32 9, i32 4, i32 13 >…
84 …%tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; …
85 ret <4 x i8> %tmp9
90 ; be folded (because [8,9,4,8] may not be a mask supported by the target).
91 define <4 x i8> @test9a(<16 x i8> %tmp6) nounwind {
96 …%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 undef, i32 9, i32 4, i32 8…
97 …%tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; …
98 ret <4 x i8> %tmp9
103 define <4 x i8> @test9b(<4 x i8> %tmp6, <4 x i8> %tmp7) nounwind {
107 …%tmp1 = shufflevector <4 x i8> %tmp6, <4 x i8> %tmp7, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 4…
108 …%tmp9 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ; <<…
109 ret <4 x i8> %tmp9
113 define <4 x i32> @test10(<4 x i32> %tmp5) nounwind {
117 …%tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i3…
118 %tmp7 = shufflevector <4 x i32> %tmp6, <4 x i32> undef, <4 x i32> zeroinitializer
119 ret <4 x i32> %tmp7
124 define <8 x i8> @test11(<16 x i8> %tmp6) nounwind {
126 ; CHECK-NEXT: shufflevector <16 x i8> %tmp6, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3…
128 …%tmp1 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; …
129 …%tmp2 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> ; …
130 …%tmp3 = shufflevector <4 x i8> %tmp1, <4 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4…
131 ret <8 x i8> %tmp3
136 define <8 x i8> @test12(<8 x i8> %tmp6, <8 x i8> %tmp2) nounwind {
138 ; CHECK-NEXT: shufflevector <8 x i8> %tmp6, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, …
140 …mp1 = shufflevector <8 x i8> %tmp6, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, …
141 …mp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, …
142 ret <8 x i8> %tmp3
147 define <8 x i8> @test12a(<8 x i8> %tmp6, <8 x i8> %tmp2) nounwind {
149 ; CHECK-NEXT: shufflevector <8 x i8> %tmp2, <8 x i8> %tmp6, <8 x i32> <i32 0, i32 3, i32 1, i32 4, …
151 …mp1 = shufflevector <8 x i8> %tmp6, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, …
152 …mp3 = shufflevector <8 x i8> %tmp2, <8 x i8> %tmp1, <8 x i32> <i32 0, i32 3, i32 1, i32 4, i32 8, …
153 ret <8 x i8> %tmp3
156 define <2 x i8> @test13a(i8 %x1, i8 %x2) {
162 %A = insertelement <2 x i8> undef, i8 %x1, i32 0
163 %B = insertelement <2 x i8> %A, i8 %x2, i32 1
164 %C = add <2 x i8> %B, <i8 5, i8 7>
165 %D = shufflevector <2 x i8> %C, <2 x i8> undef, <2 x i32> <i32 1, i32 0>
166 ret <2 x i8> %D
169 define <2 x i8> @test13b(i8 %x) {
171 ; CHECK-NEXT: insertelement <2 x i8> undef, i8 %x, i32 1
173 %A = insertelement <2 x i8> undef, i8 %x, i32 0
174 %B = shufflevector <2 x i8> %A, <2 x i8> undef, <2 x i32> <i32 undef, i32 0>
175 ret <2 x i8> %B
178 define <2 x i8> @test13c(i8 %x1, i8 %x2) {
180 ; CHECK-NEXT: insertelement <2 x i8> {{.*}}, i32 0
181 ; CHECK-NEXT: insertelement <2 x i8> {{.*}}, i32 1
183 %A = insertelement <4 x i8> undef, i8 %x1, i32 0
184 %B = insertelement <4 x i8> %A, i8 %x2, i32 2
185 %C = shufflevector <4 x i8> %B, <4 x i8> undef, <2 x i32> <i32 0, i32 2>
186 ret <2 x i8> %C
190 %tmp = alloca <4 x i16>, align 8
191 %vecinit6 = insertelement <4 x i16> undef, i16 23, i32 3
192 store <4 x i16> %vecinit6, <4 x i16>* undef
193 %tmp1 = load <4 x i16>, <4 x i16>* undef
194 %vecinit11 = insertelement <4 x i16> undef, i16 %conv10, i32 3
195 %div = udiv <4 x i16> %tmp1, %vecinit11
196 store <4 x i16> %div, <4 x i16>* %tmp
197 %tmp4 = load <4 x i16>, <4 x i16>* %tmp
198 %tmp5 = shufflevector <4 x i16> %tmp4, <4 x i16> undef, <2 x i32> <i32 2, i32 0>
199 %cmp = icmp ule <2 x i16> %tmp5, undef
200 %sext = sext <2 x i1> %cmp to <2 x i16>
207 define <4 x float> @test15a(<4 x float> %LHS, <4 x float> %RHS) {
209 ; CHECK-NEXT: shufflevector <4 x float> %LHS, <4 x float> %RHS, <4 x i32> <i32 4, i32 0, i32 6, i32…
210 ; CHECK-NEXT: ret <4 x float> %tmp4
211 %tmp1 = extractelement <4 x float> %LHS, i32 0
212 %tmp2 = insertelement <4 x float> %RHS, float %tmp1, i32 1
213 %tmp3 = extractelement <4 x float> %RHS, i32 2
214 %tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 3
215 ret <4 x float> %tmp4
218 define <4 x float> @test15b(<4 x float> %LHS, <4 x float> %RHS) {
220 ; CHECK-NEXT: shufflevector <4 x float> %LHS, <4 x float> %RHS, <4 x i32> <i32 4, i32 3, i32 6, i32…
221 ; CHECK-NEXT: ret <4 x float> %tmp5
222 %tmp0 = extractelement <4 x float> %LHS, i32 3
223 %tmp1 = insertelement <4 x float> %RHS, float %tmp0, i32 0
224 %tmp2 = extractelement <4 x float> %tmp1, i32 0
225 %tmp3 = insertelement <4 x float> %RHS, float %tmp2, i32 1
226 %tmp4 = extractelement <4 x float> %RHS, i32 2
227 %tmp5 = insertelement <4 x float> %tmp3, float %tmp4, i32 3
228 ret <4 x float> %tmp5
231 define <1 x i32> @test16a(i32 %ele) {
233 ; CHECK-NEXT: ret <1 x i32> <i32 2>
234 %tmp0 = insertelement <2 x i32> <i32 1, i32 undef>, i32 %ele, i32 1
235 %tmp1 = shl <2 x i32> %tmp0, <i32 1, i32 1>
236 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <1 x i32> <i32 0>
237 ret <1 x i32> %tmp2
240 define <4 x i8> @test16b(i8 %ele) {
242 ; CHECK-NEXT: ret <4 x i8> <i8 2, i8 2, i8 2, i8 2>
243 …%tmp0 = insertelement <8 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 undef, i8 1>, i8 %ele, i32 6
244 %tmp1 = shl <8 x i8> %tmp0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
245 %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
246 ret <4 x i8> %tmp2
250 define <4 x i32> @shuffle_17ident(<4 x i32> %v) nounwind uwtable {
253 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer,
254 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
255 %shuffle2 = shufflevector <4 x i32> %shuffle, <4 x i32> zeroinitializer,
256 <4 x i32> <i32 3, i32 0, i32 1, i32 2>
257 ret <4 x i32> %shuffle2
261 define <4 x i32> @shuffle_17and(<4 x i32> %v1, <4 x i32> %v2) nounwind uwtable {
264 ; CHECK: and <4 x i32> %v1, %v2
266 %t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
267 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
268 %t2 = shufflevector <4 x i32> %v2, <4 x i32> zeroinitializer,
269 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
270 %r = and <4 x i32> %t1, %t2
271 ret <4 x i32> %r
274 define <4 x i32> @shuffle_17add(<4 x i32> %v1, <4 x i32> %v2) nounwind uwtable {
277 ; CHECK: add <4 x i32> %v1, %v2
279 %t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
280 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
281 %t2 = shufflevector <4 x i32> %v2, <4 x i32> zeroinitializer,
282 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
283 %r = add <4 x i32> %t1, %t2
284 ret <4 x i32> %r
287 define <4 x i32> @shuffle_17addnsw(<4 x i32> %v1, <4 x i32> %v2) nounwind uwtable {
290 ; CHECK: add nsw <4 x i32> %v1, %v2
292 %t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
293 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
294 %t2 = shufflevector <4 x i32> %v2, <4 x i32> zeroinitializer,
295 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
296 %r = add nsw <4 x i32> %t1, %t2
297 ret <4 x i32> %r
300 define <4 x i32> @shuffle_17addnuw(<4 x i32> %v1, <4 x i32> %v2) nounwind uwtable {
303 ; CHECK: add nuw <4 x i32> %v1, %v2
305 %t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
306 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
307 %t2 = shufflevector <4 x i32> %v2, <4 x i32> zeroinitializer,
308 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
309 %r = add nuw <4 x i32> %t1, %t2
310 ret <4 x i32> %r
313 define <4 x float> @shuffle_17fsub_fast(<4 x float> %v1, <4 x float> %v2) nounwind uwtable {
315 ; CHECK-NEXT: [[VAR1:%[a-zA-Z0-9.]+]] = fsub fast <4 x float> %v1, %v2
316 ; CHECK-NEXT: shufflevector <4 x float> [[VAR1]], <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3…
317 ; CHECK-NEXT: ret <4 x float>
318 %t1 = shufflevector <4 x float> %v1, <4 x float> zeroinitializer,
319 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
320 %t2 = shufflevector <4 x float> %v2, <4 x float> zeroinitializer,
321 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
322 %r = fsub fast <4 x float> %t1, %t2
323 ret <4 x float> %r
326 define <4 x i32> @shuffle_17addconst(<4 x i32> %v1, <4 x i32> %v2) {
329 ; CHECK: [[VAR1:%[a-zA-Z0-9.]+]] = add <4 x i32> %v1, <i32 4, i32 1, i32 2, i32 3>
330 ; CHECK: [[VAR2:%[a-zA-Z0-9.]+]] = shufflevector <4 x i32> [[VAR1]], <4 x i32> undef, <4 x i32> <i3…
331 ; CHECK: ret <4 x i32> [[VAR2]]
332 %t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
333 <4 x i32> <i32 1, i32 2, i32 3, i32 0>
334 %r = add <4 x i32> %t1, <i32 1, i32 2, i32 3, i32 4>
335 ret <4 x i32> %r
338 define <4 x i32> @shuffle_17add2(<4 x i32> %v) {
341 ; CHECK: [[VAR:%[a-zA-Z0-9.]+]] = shl <4 x i32> %v, <i32 1, i32 1, i32 1, i32 1>
342 ; CHECK: ret <4 x i32> [[VAR]]
343 %t1 = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer,
344 <4 x i32> <i32 3, i32 2, i32 1, i32 0>
345 %t2 = add <4 x i32> %t1, %t1
346 %r = shufflevector <4 x i32> %t2, <4 x i32> zeroinitializer,
347 <4 x i32> <i32 3, i32 2, i32 1, i32 0>
348 ret <4 x i32> %r
351 define <4 x i32> @shuffle_17mulsplat(<4 x i32> %v) {
354 ; CHECK: [[VAR1:%[a-zA-Z0-9.]+]] = mul <4 x i32> %v, %v
355 ; CHECK: [[VAR2:%[a-zA-Z0-9.]+]] = shufflevector <4 x i32> [[VAR1]], <4 x i32> undef, <4 x i32> zer…
356 ; CHECK: ret <4 x i32> [[VAR2]]
357 %s1 = shufflevector <4 x i32> %v,
358 <4 x i32> zeroinitializer,
359 <4 x i32> zeroinitializer
360 %m1 = mul <4 x i32> %s1, %s1
361 %s2 = shufflevector <4 x i32> %m1,
362 <4 x i32> zeroinitializer,
363 <4 x i32> <i32 1, i32 1, i32 1, i32 1>
364 ret <4 x i32> %s2
368 define <2 x i32> @pr19717(<4 x i32> %in0, <2 x i32> %in1) {
373 %shuffle = shufflevector <4 x i32> %in0, <4 x i32> %in0, <2 x i32> zeroinitializer
374 %shuffle4 = shufflevector <2 x i32> %in1, <2 x i32> %in1, <2 x i32> zeroinitializer
375 %mul = mul <2 x i32> %shuffle, %shuffle4
376 ret <2 x i32> %mul
379 define <4 x i16> @pr19717a(<8 x i16> %in0, <8 x i16> %in1) {
381 ; CHECK: [[VAR1:%[a-zA-Z0-9.]+]] = mul <8 x i16> %in0, %in1
382 ; CHECK: [[VAR2:%[a-zA-Z0-9.]+]] = shufflevector <8 x i16> [[VAR1]], <8 x i16> undef, <4 x i32> <i3…
383 ; CHECK: ret <4 x i16> [[VAR2]]
384 %shuffle = shufflevector <8 x i16> %in0, <8 x i16> %in0, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
385 %shuffle1 = shufflevector <8 x i16> %in1, <8 x i16> %in1, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
386 %mul = mul <4 x i16> %shuffle, %shuffle1
387 ret <4 x i16> %mul
390 define <8 x i8> @pr19730(<16 x i8> %in0) {
393 …%shuffle = shufflevector <16 x i8> %in0, <16 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i…
394 …%shuffle1 = shufflevector <8 x i8> %shuffle, <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4…
395 ret <8 x i8> %shuffle1
398 define i32 @pr19737(<4 x i32> %in0) {
400 ; CHECK: [[VAR:%[a-zA-Z0-9.]+]] = extractelement <4 x i32> %in0, i32 0
402 …%shuffle.i = shufflevector <4 x i32> zeroinitializer, <4 x i32> %in0, <4 x i32> <i32 0, i32 4, i32…
403 %neg.i = xor <4 x i32> %shuffle.i, <i32 -1, i32 -1, i32 -1, i32 -1>
404 %and.i = and <4 x i32> %in0, %neg.i
405 %rv = extractelement <4 x i32> %and.i, i32 0
413 define <4 x i32> @pr20059(<4 x i32> %p1, <4 x i32> %p2) {
415 ; CHECK-NEXT: %splat1 = shufflevector <4 x i32> %p1, <4 x i32> undef, <4 x i32> zeroinitializer
416 ; CHECK-NEXT: %splat2 = shufflevector <4 x i32> %p2, <4 x i32> undef, <4 x i32> zeroinitializer
417 ; CHECK-NEXT: %retval = srem <4 x i32> %splat1, %splat2
418 %splat1 = shufflevector <4 x i32> %p1, <4 x i32> undef, <4 x i32> zeroinitializer
419 %splat2 = shufflevector <4 x i32> %p2, <4 x i32> undef, <4 x i32> zeroinitializer
420 %retval = srem <4 x i32> %splat1, %splat2
421 ret <4 x i32> %retval
424 define <4 x i32> @pr20114(<4 x i32> %__mask) {
428 …%mask01.i = shufflevector <4 x i32> %__mask, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 …
429 …d <4 x i32> bitcast (<2 x i64> <i64 ptrtoint (<4 x i32> (<4 x i32>)* @pr20114 to i64), i64 ptrtoin…
430 ret <4 x i32> %masked_new.i.i.i
433 define <2 x i32*> @pr23113(<4 x i32*> %A) {
435 ; CHECK: %[[V:.*]] = shufflevector <4 x i32*> %A, <4 x i32*> undef, <2 x i32> <i32 0, i32 1>
436 ; CHECK-NEXT: ret <2 x i32*> %[[V]]
437 %1 = shufflevector <4 x i32*> %A, <4 x i32*> undef, <2 x i32> <i32 0, i32 1>
438 ret <2 x i32*> %1