Lines Matching full:b
33 b.eq .Lenc_key_abort
35 b.eq .Lenc_key_abort
38 b.lt .Lenc_key_abort
40 b.gt .Lenc_key_abort
42 b.ne .Lenc_key_abort
48 eor v0.16b,v0.16b,v0.16b
49 ld1 {v3.16b},[x0],#16
53 b.lt .Loop128
55 b .L256
59 tbl v6.16b,{v3.16b},v2.16b
60 ext v5.16b,v0.16b,v3.16b,#12
62 aese v6.16b,v0.16b
65 eor v3.16b,v3.16b,v5.16b
66 ext v5.16b,v0.16b,v5.16b,#12
67 eor v3.16b,v3.16b,v5.16b
68 ext v5.16b,v0.16b,v5.16b,#12
69 eor v6.16b,v6.16b,v1.16b
70 eor v3.16b,v3.16b,v5.16b
71 shl v1.16b,v1.16b,#1
72 eor v3.16b,v3.16b,v6.16b
73 b.ne .Loop128
77 tbl v6.16b,{v3.16b},v2.16b
78 ext v5.16b,v0.16b,v3.16b,#12
80 aese v6.16b,v0.16b
82 eor v3.16b,v3.16b,v5.16b
83 ext v5.16b,v0.16b,v5.16b,#12
84 eor v3.16b,v3.16b,v5.16b
85 ext v5.16b,v0.16b,v5.16b,#12
86 eor v6.16b,v6.16b,v1.16b
87 eor v3.16b,v3.16b,v5.16b
88 shl v1.16b,v1.16b,#1
89 eor v3.16b,v3.16b,v6.16b
91 tbl v6.16b,{v3.16b},v2.16b
92 ext v5.16b,v0.16b,v3.16b,#12
94 aese v6.16b,v0.16b
96 eor v3.16b,v3.16b,v5.16b
97 ext v5.16b,v0.16b,v5.16b,#12
98 eor v3.16b,v3.16b,v5.16b
99 ext v5.16b,v0.16b,v5.16b,#12
100 eor v6.16b,v6.16b,v1.16b
101 eor v3.16b,v3.16b,v5.16b
102 eor v3.16b,v3.16b,v6.16b
107 b .Ldone
113 ld1 {v4.16b},[x0]
119 tbl v6.16b,{v4.16b},v2.16b
120 ext v5.16b,v0.16b,v3.16b,#12
122 aese v6.16b,v0.16b
125 eor v3.16b,v3.16b,v5.16b
126 ext v5.16b,v0.16b,v5.16b,#12
127 eor v3.16b,v3.16b,v5.16b
128 ext v5.16b,v0.16b,v5.16b,#12
129 eor v6.16b,v6.16b,v1.16b
130 eor v3.16b,v3.16b,v5.16b
131 shl v1.16b,v1.16b,#1
132 eor v3.16b,v3.16b,v6.16b
134 b.eq .Ldone
137 ext v5.16b,v0.16b,v4.16b,#12
138 aese v6.16b,v0.16b
140 eor v4.16b,v4.16b,v5.16b
141 ext v5.16b,v0.16b,v5.16b,#12
142 eor v4.16b,v4.16b,v5.16b
143 ext v5.16b,v0.16b,v5.16b,#12
144 eor v4.16b,v4.16b,v5.16b
146 eor v4.16b,v4.16b,v6.16b
147 b .Loop256
166 ld1 {v2.16b},[x0]
171 aese v2.16b,v0.16b
172 aesmc v2.16b,v2.16b
175 aese v2.16b,v1.16b
176 aesmc v2.16b,v2.16b
178 b.gt .Loop_enc
180 aese v2.16b,v0.16b
181 aesmc v2.16b,v2.16b
183 aese v2.16b,v1.16b
184 eor v2.16b,v2.16b,v0.16b
186 st1 {v2.16b},[x1]
224 // could write to v1.16b and v18.16b directly, but that trips this bugs.
225 // We write to v6.16b and copy to the final register as a workaround.
233 orr v6.16b,v0.16b,v0.16b
237 orr v1.16b,v6.16b,v6.16b
238 b.ls .Lctr32_tail
242 orr v18.16b,v6.16b,v6.16b
243 b .Loop3x_ctr32
247 aese v0.16b,v16.16b
248 aesmc v0.16b,v0.16b
249 aese v1.16b,v16.16b
250 aesmc v1.16b,v1.16b
251 aese v18.16b,v16.16b
252 aesmc v18.16b,v18.16b
255 aese v0.16b,v17.16b
256 aesmc v0.16b,v0.16b
257 aese v1.16b,v17.16b
258 aesmc v1.16b,v1.16b
259 aese v18.16b,v17.16b
260 aesmc v18.16b,v18.16b
262 b.gt .Loop3x_ctr32
264 aese v0.16b,v16.16b
265 aesmc v4.16b,v0.16b
266 aese v1.16b,v16.16b
267 aesmc v5.16b,v1.16b
268 ld1 {v2.16b},[x0],#16
270 aese v18.16b,v16.16b
271 aesmc v18.16b,v18.16b
272 ld1 {v3.16b},[x0],#16
274 aese v4.16b,v17.16b
275 aesmc v4.16b,v4.16b
276 aese v5.16b,v17.16b
277 aesmc v5.16b,v5.16b
278 ld1 {v19.16b},[x0],#16
280 aese v18.16b,v17.16b
281 aesmc v17.16b,v18.16b
282 aese v4.16b,v20.16b
283 aesmc v4.16b,v4.16b
284 aese v5.16b,v20.16b
285 aesmc v5.16b,v5.16b
286 eor v2.16b,v2.16b,v7.16b
288 aese v17.16b,v20.16b
289 aesmc v17.16b,v17.16b
290 eor v3.16b,v3.16b,v7.16b
292 aese v4.16b,v21.16b
293 aesmc v4.16b,v4.16b
294 aese v5.16b,v21.16b
295 aesmc v5.16b,v5.16b
296 // Note the logic to update v0.16b, v1.16b, and v1.16b is written to work
299 eor v19.16b,v19.16b,v7.16b
301 aese v17.16b,v21.16b
302 aesmc v17.16b,v17.16b
303 orr v0.16b,v6.16b,v6.16b
305 aese v4.16b,v22.16b
306 aesmc v4.16b,v4.16b
309 aese v5.16b,v22.16b
310 aesmc v5.16b,v5.16b
311 orr v1.16b,v6.16b,v6.16b
313 aese v17.16b,v22.16b
314 aesmc v17.16b,v17.16b
315 orr v18.16b,v6.16b,v6.16b
317 aese v4.16b,v23.16b
318 aese v5.16b,v23.16b
319 aese v17.16b,v23.16b
321 eor v2.16b,v2.16b,v4.16b
323 st1 {v2.16b},[x1],#16
324 eor v3.16b,v3.16b,v5.16b
326 st1 {v3.16b},[x1],#16
327 eor v19.16b,v19.16b,v17.16b
329 st1 {v19.16b},[x1],#16
330 b.hs .Loop3x_ctr32
333 b.eq .Lctr32_done
339 aese v0.16b,v16.16b
340 aesmc v0.16b,v0.16b
341 aese v1.16b,v16.16b
342 aesmc v1.16b,v1.16b
345 aese v0.16b,v17.16b
346 aesmc v0.16b,v0.16b
347 aese v1.16b,v17.16b
348 aesmc v1.16b,v1.16b
350 b.gt .Lctr32_tail
352 aese v0.16b,v16.16b
353 aesmc v0.16b,v0.16b
354 aese v1.16b,v16.16b
355 aesmc v1.16b,v1.16b
356 aese v0.16b,v17.16b
357 aesmc v0.16b,v0.16b
358 aese v1.16b,v17.16b
359 aesmc v1.16b,v1.16b
360 ld1 {v2.16b},[x0],x12
361 aese v0.16b,v20.16b
362 aesmc v0.16b,v0.16b
363 aese v1.16b,v20.16b
364 aesmc v1.16b,v1.16b
365 ld1 {v3.16b},[x0]
366 aese v0.16b,v21.16b
367 aesmc v0.16b,v0.16b
368 aese v1.16b,v21.16b
369 aesmc v1.16b,v1.16b
370 eor v2.16b,v2.16b,v7.16b
371 aese v0.16b,v22.16b
372 aesmc v0.16b,v0.16b
373 aese v1.16b,v22.16b
374 aesmc v1.16b,v1.16b
375 eor v3.16b,v3.16b,v7.16b
376 aese v0.16b,v23.16b
377 aese v1.16b,v23.16b
380 eor v2.16b,v2.16b,v0.16b
381 eor v3.16b,v3.16b,v1.16b
382 st1 {v2.16b},[x1],#16
383 b.eq .Lctr32_done
384 st1 {v3.16b},[x1]