Lines Matching full:b
35 b.eq Lenc_key_abort
37 b.eq Lenc_key_abort
40 b.lt Lenc_key_abort
42 b.gt Lenc_key_abort
44 b.ne Lenc_key_abort
50 eor v0.16b,v0.16b,v0.16b
51 ld1 {v3.16b},[x0],#16
55 b.lt Loop128
57 b L256
61 tbl v6.16b,{v3.16b},v2.16b
62 ext v5.16b,v0.16b,v3.16b,#12
64 aese v6.16b,v0.16b
67 eor v3.16b,v3.16b,v5.16b
68 ext v5.16b,v0.16b,v5.16b,#12
69 eor v3.16b,v3.16b,v5.16b
70 ext v5.16b,v0.16b,v5.16b,#12
71 eor v6.16b,v6.16b,v1.16b
72 eor v3.16b,v3.16b,v5.16b
73 shl v1.16b,v1.16b,#1
74 eor v3.16b,v3.16b,v6.16b
75 b.ne Loop128
79 tbl v6.16b,{v3.16b},v2.16b
80 ext v5.16b,v0.16b,v3.16b,#12
82 aese v6.16b,v0.16b
84 eor v3.16b,v3.16b,v5.16b
85 ext v5.16b,v0.16b,v5.16b,#12
86 eor v3.16b,v3.16b,v5.16b
87 ext v5.16b,v0.16b,v5.16b,#12
88 eor v6.16b,v6.16b,v1.16b
89 eor v3.16b,v3.16b,v5.16b
90 shl v1.16b,v1.16b,#1
91 eor v3.16b,v3.16b,v6.16b
93 tbl v6.16b,{v3.16b},v2.16b
94 ext v5.16b,v0.16b,v3.16b,#12
96 aese v6.16b,v0.16b
98 eor v3.16b,v3.16b,v5.16b
99 ext v5.16b,v0.16b,v5.16b,#12
100 eor v3.16b,v3.16b,v5.16b
101 ext v5.16b,v0.16b,v5.16b,#12
102 eor v6.16b,v6.16b,v1.16b
103 eor v3.16b,v3.16b,v5.16b
104 eor v3.16b,v3.16b,v6.16b
109 b Ldone
115 ld1 {v4.16b},[x0]
121 tbl v6.16b,{v4.16b},v2.16b
122 ext v5.16b,v0.16b,v3.16b,#12
124 aese v6.16b,v0.16b
127 eor v3.16b,v3.16b,v5.16b
128 ext v5.16b,v0.16b,v5.16b,#12
129 eor v3.16b,v3.16b,v5.16b
130 ext v5.16b,v0.16b,v5.16b,#12
131 eor v6.16b,v6.16b,v1.16b
132 eor v3.16b,v3.16b,v5.16b
133 shl v1.16b,v1.16b,#1
134 eor v3.16b,v3.16b,v6.16b
136 b.eq Ldone
139 ext v5.16b,v0.16b,v4.16b,#12
140 aese v6.16b,v0.16b
142 eor v4.16b,v4.16b,v5.16b
143 ext v5.16b,v0.16b,v5.16b,#12
144 eor v4.16b,v4.16b,v5.16b
145 ext v5.16b,v0.16b,v5.16b,#12
146 eor v4.16b,v4.16b,v5.16b
148 eor v4.16b,v4.16b,v6.16b
149 b Loop256
170 ld1 {v2.16b},[x0]
175 aese v2.16b,v0.16b
176 aesmc v2.16b,v2.16b
179 aese v2.16b,v1.16b
180 aesmc v2.16b,v2.16b
182 b.gt Loop_enc
184 aese v2.16b,v0.16b
185 aesmc v2.16b,v2.16b
187 aese v2.16b,v1.16b
188 eor v2.16b,v2.16b,v0.16b
190 st1 {v2.16b},[x1]
230 // could write to v1.16b and v18.16b directly, but that trips this bugs.
231 // We write to v6.16b and copy to the final register as a workaround.
239 orr v6.16b,v0.16b,v0.16b
243 orr v1.16b,v6.16b,v6.16b
244 b.ls Lctr32_tail
248 orr v18.16b,v6.16b,v6.16b
249 b Loop3x_ctr32
253 aese v0.16b,v16.16b
254 aesmc v0.16b,v0.16b
255 aese v1.16b,v16.16b
256 aesmc v1.16b,v1.16b
257 aese v18.16b,v16.16b
258 aesmc v18.16b,v18.16b
261 aese v0.16b,v17.16b
262 aesmc v0.16b,v0.16b
263 aese v1.16b,v17.16b
264 aesmc v1.16b,v1.16b
265 aese v18.16b,v17.16b
266 aesmc v18.16b,v18.16b
268 b.gt Loop3x_ctr32
270 aese v0.16b,v16.16b
271 aesmc v4.16b,v0.16b
272 aese v1.16b,v16.16b
273 aesmc v5.16b,v1.16b
274 ld1 {v2.16b},[x0],#16
276 aese v18.16b,v16.16b
277 aesmc v18.16b,v18.16b
278 ld1 {v3.16b},[x0],#16
280 aese v4.16b,v17.16b
281 aesmc v4.16b,v4.16b
282 aese v5.16b,v17.16b
283 aesmc v5.16b,v5.16b
284 ld1 {v19.16b},[x0],#16
286 aese v18.16b,v17.16b
287 aesmc v17.16b,v18.16b
288 aese v4.16b,v20.16b
289 aesmc v4.16b,v4.16b
290 aese v5.16b,v20.16b
291 aesmc v5.16b,v5.16b
292 eor v2.16b,v2.16b,v7.16b
294 aese v17.16b,v20.16b
295 aesmc v17.16b,v17.16b
296 eor v3.16b,v3.16b,v7.16b
298 aese v4.16b,v21.16b
299 aesmc v4.16b,v4.16b
300 aese v5.16b,v21.16b
301 aesmc v5.16b,v5.16b
302 // Note the logic to update v0.16b, v1.16b, and v1.16b is written to work
305 eor v19.16b,v19.16b,v7.16b
307 aese v17.16b,v21.16b
308 aesmc v17.16b,v17.16b
309 orr v0.16b,v6.16b,v6.16b
311 aese v4.16b,v22.16b
312 aesmc v4.16b,v4.16b
315 aese v5.16b,v22.16b
316 aesmc v5.16b,v5.16b
317 orr v1.16b,v6.16b,v6.16b
319 aese v17.16b,v22.16b
320 aesmc v17.16b,v17.16b
321 orr v18.16b,v6.16b,v6.16b
323 aese v4.16b,v23.16b
324 aese v5.16b,v23.16b
325 aese v17.16b,v23.16b
327 eor v2.16b,v2.16b,v4.16b
329 st1 {v2.16b},[x1],#16
330 eor v3.16b,v3.16b,v5.16b
332 st1 {v3.16b},[x1],#16
333 eor v19.16b,v19.16b,v17.16b
335 st1 {v19.16b},[x1],#16
336 b.hs Loop3x_ctr32
339 b.eq Lctr32_done
345 aese v0.16b,v16.16b
346 aesmc v0.16b,v0.16b
347 aese v1.16b,v16.16b
348 aesmc v1.16b,v1.16b
351 aese v0.16b,v17.16b
352 aesmc v0.16b,v0.16b
353 aese v1.16b,v17.16b
354 aesmc v1.16b,v1.16b
356 b.gt Lctr32_tail
358 aese v0.16b,v16.16b
359 aesmc v0.16b,v0.16b
360 aese v1.16b,v16.16b
361 aesmc v1.16b,v1.16b
362 aese v0.16b,v17.16b
363 aesmc v0.16b,v0.16b
364 aese v1.16b,v17.16b
365 aesmc v1.16b,v1.16b
366 ld1 {v2.16b},[x0],x12
367 aese v0.16b,v20.16b
368 aesmc v0.16b,v0.16b
369 aese v1.16b,v20.16b
370 aesmc v1.16b,v1.16b
371 ld1 {v3.16b},[x0]
372 aese v0.16b,v21.16b
373 aesmc v0.16b,v0.16b
374 aese v1.16b,v21.16b
375 aesmc v1.16b,v1.16b
376 eor v2.16b,v2.16b,v7.16b
377 aese v0.16b,v22.16b
378 aesmc v0.16b,v0.16b
379 aese v1.16b,v22.16b
380 aesmc v1.16b,v1.16b
381 eor v3.16b,v3.16b,v7.16b
382 aese v0.16b,v23.16b
383 aese v1.16b,v23.16b
386 eor v2.16b,v2.16b,v0.16b
387 eor v3.16b,v3.16b,v1.16b
388 st1 {v2.16b},[x1],#16
389 b.eq Lctr32_done
390 st1 {v3.16b},[x1]