Lines Matching defs:arg2
191 Register Op(Decoder::OpOpcode opcode, Register arg1, Register arg2) { in Op()
235 Register Op32(Decoder::Op32Opcode opcode, Register arg1, Register arg2) { in Op32()
439 Register arg2, in CompareAndBranch()
1330 void OpVector(const Decoder::VOpFVfArgs& args, ElementType arg2) { in OpVector()
2408 void OpVector(const Decoder::VOpIVxArgs& args, Register arg2) { in OpVector()
2844 void OpVector(const Decoder::VOpMVxArgs& args, Register arg2) { in OpVector()
3357 void OpVectorToMaskvx(uint8_t dst, uint8_t src1, ElementType arg2) { in OpVectorToMaskvx()
3656 void OpVectorWidenwx(uint8_t dst, uint8_t src1, ElementType arg2) { in OpVectorWidenwx()
3676 void OpVectorWidenvx(uint8_t dst, uint8_t src1, ElementType arg2) { in OpVectorWidenvx()
3696 void OpVectorWidenvxw(uint8_t dst, uint8_t src1, ElementType arg2) { in OpVectorWidenvxw()
3786 void OpVectorvxm(uint8_t dst, uint8_t src1, ElementType arg2) { in OpVectorvxm()
3875 void OpVectorvx(uint8_t dst, uint8_t src1, ElementType arg2) { in OpVectorvx()
3948 void OpVectorNarrowwx(uint8_t dst, uint8_t src1, ElementType arg2) { in OpVectorNarrowwx()
4083 void OpVectorvxv(uint8_t dst, uint8_t src1, ElementType arg2) { in OpVectorvxv()
4098 void OpVectorx(uint8_t dst, ElementType arg2, DstMaskType... dst_mask) { in OpVectorx()
4109 void OpVectorx(uint8_t dst, ElementType arg2, DstMaskType... dst_mask) { in OpVectorx()
4263 SIMD128Register arg2 = state_->cpu.v[src + first_arg_disp + 1]; in OpVectorslidedown() local