1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef AMD_COMMON_ALIB_H 4 #define AMD_COMMON_ALIB_H 5 6 #define ALIB_FUNCTION_REPORT_AC_DC_STATE 0x1 7 #define ALIB_FUNCTION_DYNAMIC_POWER_THERMAL_CONFIG 0xc 8 9 #ifndef __ACPI__ 10 11 /* parameter IDs for the ALIB_FUNCTION_DYNAMIC_POWER_THERMAL_CONFIG function */ 12 enum alib_dptc_parameter_ids { 13 ALIB_DPTC_THERMAL_CONTROL_LIMIT_ID = 0x3, 14 ALIB_DPTC_SUSTAINED_POWER_LIMIT_ID = 0x5, 15 ALIB_DPTC_FAST_PPT_LIMIT_ID = 0x6, 16 ALIB_DPTC_SLOW_PPT_LIMIT_ID = 0x7, 17 ALIB_DPTC_SLOW_PPT_TIME_CONSTANT_ID = 0x8, 18 ALIB_DPTC_PROCHOT_L_DEASSERTION_RAMP_TIME_ID = 0x9, 19 ALIB_DPTC_VRM_CURRENT_LIMIT_ID = 0xb, 20 ALIB_DPTC_VRM_MAXIMUM_CURRENT_LIMIT = 0xc, 21 /* Picasso: SetVrmSocCurrentLimit (0xe) is not implemented in alib. */ 22 ALIB_DPTC_VRM_SOC_CURRENT_LIMIT_ID = 0xe, 23 24 ALIB_DPTC_STT_ALPHA_APU = 0x20, 25 ALIB_DPTC_STT_SKIN_TEMPERATURE_LIMIT_APU_ID = 0x22, 26 ALIB_DPTC_STT_M1_ID = 0x26, 27 ALIB_DPTC_STT_M2_ID = 0x27, 28 ALIB_DPTC_STT_C_APU_ID = 0x2C, 29 ALIB_DPTC_STT_MIN_LIMIT_ID = 0x2E, 30 }; 31 32 struct alib_dptc_param { 33 uint8_t id; 34 uint32_t value; 35 } __packed; 36 37 void acpigen_write_alib_dptc_default(uint8_t *default_param, size_t default_param_len); 38 void acpigen_write_alib_dptc_no_battery(uint8_t *no_battery_param, size_t no_battery_param_len); 39 void acpigen_write_alib_dptc_tablet(uint8_t *tablet_param, size_t tablet_param_len); 40 void acpigen_write_alib_dptc_thermal_B(uint8_t *thermal_param_B, size_t thermal_param_B_len); 41 void acpigen_write_alib_dptc_thermal_C(uint8_t *thermal_param_C, size_t thermal_param_C_len); 42 void acpigen_write_alib_dptc_thermal_D(uint8_t *thermal_param_D, size_t thermal_param_D_len); 43 void acpigen_write_alib_dptc_thermal_E(uint8_t *thermal_param_E, size_t thermal_param_E_len); 44 void acpigen_write_alib_dptc_thermal_F(uint8_t *thermal_param_F, size_t thermal_param_F_len); 45 #endif /* !__ACPI__ */ 46 47 #endif /* AMD_COMMON_ALIB_H */ 48