1## SPDX-License-Identifier: GPL-2.0-only 2 3config CAVIUM_BDK 4 def_bool n 5 select HAVE_DEBUG_RAM_SETUP 6 help 7 Build Cavium's BDK in romstage. 8 9if CAVIUM_BDK 10 11menu "BDK" 12 13config CAVIUM_BDK_VERBOSE_INIT 14 bool "Enable verbose init" 15 depends on CAVIUM_BDK 16 help 17 Build Cavium's BDK with verbose init code. 18 19config CAVIUM_BDK_VERBOSE_DRAM 20 bool "Enable verbose dram init" 21 default y if DEBUG_RAM_SETUP 22 depends on CAVIUM_BDK 23 help 24 Build Cavium's BDK with verbose dram init code. 25 26config CAVIUM_BDK_VERBOSE_DRAM_TEST 27 bool "Enable verbose raminit tests" 28 depends on CAVIUM_BDK 29 help 30 Build Cavium's BDK with verbose DRAM testing code. 31 32config CAVIUM_BDK_VERBOSE_QLM 33 bool "Enable verbose qlm init" 34 depends on CAVIUM_BDK 35 help 36 Build Cavium's BDK with verbose QLM code. 37 38config CAVIUM_BDK_VERBOSE_PCIE_CONFIG 39 bool "Enable verbose pcie config" 40 depends on CAVIUM_BDK 41 help 42 Build Cavium's BDK with verbose PCIe config code. 43 44config CAVIUM_BDK_VERBOSE_PCIE 45 bool "Enable verbose pcie init" 46 depends on CAVIUM_BDK 47 help 48 Build Cavium's BDK with verbose PCIe code. 49 50config CAVIUM_BDK_VERBOSE_PHY 51 bool "Enable verbose phy init" 52 depends on CAVIUM_BDK 53 help 54 Build Cavium's BDK with verbose PHY code. 55 56config CAVIUM_BDK_DDR_TUNE_HW_OFFSETS 57 bool "Hardware assisted DLL read offset tuning" 58 default n 59 depends on CAVIUM_BDK 60 61 help 62 Automatically tune the data byte DLL read offsets. 63 Always done by default, but allow use of HW-assist. 64 NOTE: HW-assist will also tune the ECC byte. 65 66config CAVIUM_BDK_DDR_TUNE_WRITE_OFFSETS 67 bool "Automatically tune the data byte DLL write offsets" 68 default n 69 depends on CAVIUM_BDK 70 71config CAVIUM_BDK_DDR_TUNE_ECC_ENABLE 72 bool "Automatically tune the ECC byte DLL read offsets" 73 default n 74 depends on CAVIUM_BDK 75 76endmenu 77 78endif 79