1## SPDX-License-Identifier: GPL-2.0-only 2 3config CACHE_MRC_SETTINGS 4 bool 5 help 6 Save cached MRC settings 7 8if CACHE_MRC_SETTINGS 9 10config MRC_SETTINGS_CACHE_SIZE 11 hex 12 default 0x10000 13 14config MRC_SETTINGS_PROTECT 15 bool "Enable protection on MRC settings" 16 default n 17 18config HAS_RECOVERY_MRC_CACHE 19 bool 20 default n 21 22config MRC_SETTINGS_VARIABLE_DATA 23 bool 24 default n 25 26config MRC_WRITE_NV_LATE 27 bool 28 default n 29 help 30 MRC settings are normally written to NVRAM at BS_DEV_ENUMERATE-EXIT. 31 If a platform requires MRC settings written to NVRAM later than 32 normal, select this item. This will cause the write to occur at 33 BS_OS_RESUME_CHECK-ENTRY. 34 35config MRC_STASH_TO_CBMEM 36 bool 37 default y if MRC_WRITE_NV_LATE || BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES 38 default n 39 help 40 Instead of writing back MRC_CACHE training data back to the 41 MRC_CACHE right away, stash the data into cbmem. This data 42 will be written back later to MRC_CACHE. This is selected 43 for platforms which either do not support writes to SPI 44 flash in early stages 45 (BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES) or the platforms 46 that need to write back the MRC data in late ramstage boot 47 states (MRC_WRITE_NV_LATE). 48 49config MRC_SAVE_HASH_IN_TPM 50 bool "Save a hash of the MRC_CACHE data in TPM NVRAM" 51 depends on VBOOT_STARTS_IN_BOOTBLOCK && TPM2 && !TPM1 && !VBOOT_MOCK_SECDATA 52 default y 53 help 54 Store a hash of the MRC_CACHE training data in a TPM NVRAM 55 space to ensure that it cannot be tampered with. 56 57config MRC_CACHE_USING_MRC_VERSION 58 bool 59 default n 60 help 61 Use the MRC version info from FSP extended header to store the MRC cache data. 62 This method relies on the FSP_PRODUCER_DATA_TABLES belongs to the 63 `FspProducerDataHeader.h`file to get the MRC version. 64 65 Supported platform can retrieve the MRC version by directly parsing the binary. 66 67endif # CACHE_MRC_SETTINGS 68