• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1## SPDX-License-Identifier: GPL-2.0-only
2
3config PAYLOAD_BUILD_SEABIOS
4	bool
5
6if PAYLOAD_SEABIOS
7
8config PAYLOAD_FILE
9	default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
10
11endif
12
13if PAYLOAD_BUILD_SEABIOS
14
15choice
16	prompt "SeaBIOS version"
17	default SEABIOS_STABLE
18
19config SEABIOS_STABLE
20	bool "1.16.3"
21	help
22	  Stable SeaBIOS version
23config SEABIOS_MASTER
24	bool "master"
25	help
26	  Newest SeaBIOS version
27config SEABIOS_REVISION
28	bool "git revision"
29	help
30	  Select this option if you have a specific commit or branch
31	  that you want to use as the revision from which to
32	  build SeaBIOS.
33
34	  You will be able to specify the name of a branch or a commit id
35	  later.
36
37endchoice
38
39config SEABIOS_REVISION_ID
40	string "Insert a commit's SHA-1 or a branch name"
41	depends on SEABIOS_REVISION
42	default "origin/master"
43	help
44	   The commit's SHA-1 or branch name of the revision to use.
45
46config SEABIOS_PS2_TIMEOUT
47	prompt "PS/2 keyboard controller initialization timeout (milliseconds)"
48	default 0
49	int
50	help
51	  Some PS/2 keyboard controllers don't respond to commands immediately
52	  after powering on. This specifies how long SeaBIOS will wait for the
53	  keyboard controller to become ready before giving up.
54
55config SEABIOS_THREAD_OPTIONROMS
56	prompt "Hardware init during option ROM execution"
57	default n
58	bool
59	help
60	  Allow hardware init to run in parallel with optionrom execution.
61
62	  This can reduce boot time, but can cause some timing
63	  variations during option ROM code execution. It is not
64	  known if all option ROMs will behave properly with this option.
65
66config SEABIOS_HARDWARE_IRQ
67	prompt "Hardware Interrupts"
68	default y
69	bool
70	help
71	  Program and support hardware interrupts using the i8259
72	  programmable interrupt controller (PIC).  Deselected by
73	  boards which would otherwise hang at the boot menu (eg,
74	  google/rambi).
75
76config SEABIOS_VGA_COREBOOT
77	prompt "Include generated option rom that implements legacy VGA BIOS compatibility"
78	default y if !VENDOR_EMULATION
79	default y if COREDOOM_SECONDARY_PAYLOAD
80	depends on !VGA_ROM_RUN && (VGA_TEXT_FRAMEBUFFER || LINEAR_FRAMEBUFFER)
81	bool
82	help
83	  coreboot can initialize the GPU of some mainboards.
84
85	  After initializing the GPU, the information about it can be passed to the payload.
86	  Provide an option rom that implements this legacy VGA BIOS compatibility requirement.
87
88config PAYLOAD_CONFIGFILE
89	string "SeaBIOS config file"
90	default ""
91	help
92	  This option allows a platform to set Kconfig options for a basic
93	  SeaBIOS payload.  In general, if the option is used, the default
94	  would be "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios"
95
96config SEABIOS_BOOTORDER_FILE
97	string "SeaBIOS bootorder file"
98	default ""
99	help
100	  Add a SeaBIOS bootorder file.  From the wiki:
101	  "The bootorder file may be used to configure the boot up order. The file
102	  should be ASCII text and contain one line per boot method. The description
103	  of each boot method follows an Open Firmware device path format. SeaBIOS
104	  will attempt to boot from each item in the file - first line of the file
105	  first."
106
107	  See: https://www.coreboot.org/SeaBIOS#Configuring_boot_order
108
109	  If used, a typical value would be:
110	    $(top)/src/mainboard/$(MAINBOARDDIR)/bootorder
111
112config SEABIOS_ADD_SERCON_PORT_FILE
113	prompt "Add SeaBIOS sercon-port file to CBFS"
114	default n
115	bool
116	help
117	  Select this option to enable SeaBIOS' VGA adapter emulation
118	  on serial port.
119
120config SEABIOS_SERCON_PORT_ADDR
121	hex "SeaBIOS sercon-port base address"
122	depends on SEABIOS_ADD_SERCON_PORT_FILE
123	default TTYS0_BASE
124	help
125	  Set this field to the IO address of a serial port for SeaBIOS' VGA
126	  adapter emulation.
127
128	  By default primary console UART defined by TTYS0_BASE is used.
129
130config PAYLOAD_VGABIOS_FILE
131	string
132	depends on SEABIOS_VGA_COREBOOT
133	default "payloads/external/SeaBIOS/seabios/out/vgabios.bin"
134
135config SEABIOS_DEBUG_LEVEL
136	int "SeaBIOS debug level (verbosity)"
137	default -1
138	help
139	  The higher the number, the more verbose SeaBIOS will be. See the table
140	  below for the current values corresponding to various items as of SeaBIOS
141	  version 1.10.1. Set this value to -1 to use SeaBIOS' default.
142
143	  Output at various SeaBIOS log levels:
144	  level 0  - Logging disabled
145	  level 1  - Basic output, interrupts 5, 18h, 19h, 40h, SMP, PNP, PMM
146	  level 2  - AHCI, Floppy, Basic ps2, interrupts 11h, 12h, 14h, 17h
147	  level 3  - bootsplash, initializations, SeaBIOS VGA BIOS interrupts
148	  level 4  - BIOS tables, more optionrom
149	  level 5  - Extra bootsplash, more XHCI
150	  level 6  - ATA commands, extra optionrom
151	  level 7  - extra ps2 commands, more OHCI & EHCI
152	  level 8  - extra malloc info, more AHCI
153	  level 9  - interrupts 15h, 16h, 1ah, APM, PCI, SMIs, PCIBIOS,
154	             USB-HID commands, SDcard commands, Floppy commands
155	  level 10 - interrupt 13h (Drives other than floppy)
156	  level 20 - interrupt 10h (Display)
157
158comment "Using default SeaBIOS log level"
159	depends on SEABIOS_DEBUG_LEVEL = -1
160
161comment "SeaBIOS logging disabled"
162	depends on SEABIOS_DEBUG_LEVEL = 0
163
164endif
165