1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef __X4X_REGISTERS_HOSTBRIDGE_H__ 4 #define __X4X_REGISTERS_HOSTBRIDGE_H__ 5 6 #define D0F0_EPBAR_LO 0x40 7 #define D0F0_EPBAR_HI 0x44 8 #define D0F0_MCHBAR_LO 0x48 9 #define D0F0_MCHBAR_HI 0x4c 10 #define D0F0_GGC 0x52 11 #define D0F0_DEVEN 0x54 12 #define D0EN (1 << 0) 13 #define D1EN (1 << 1) 14 #define IGD0EN (1 << 3) 15 #define IGD1EN (1 << 4) 16 #define D3F0EN (1 << 6) 17 #define D3F1EN (1 << 7) 18 #define D3F2EN (1 << 8) 19 #define D3F3EN (1 << 9) 20 #define PEG1EN (1 << 13) 21 #define BOARD_DEVEN (D0EN | D1EN | IGD0EN | IGD1EN | PEG1EN) 22 #define D0F0_PCIEXBAR_LO 0x60 23 #define D0F0_PCIEXBAR_HI 0x64 24 #define D0F0_DMIBAR_LO 0x68 25 #define D0F0_DMIBAR_HI 0x6c 26 #define D0F0_PAM(x) (0x90 + (x)) /* 0-6 */ 27 #define D0F0_REMAPBASE 0x98 28 #define D0F0_REMAPLIMIT 0x9a 29 #define D0F0_SMRAM 0x9d 30 #define D0F0_ESMRAMC 0x9e 31 #define D0F0_TOM 0xa0 32 #define D0F0_TOUUD 0xa2 33 #define D0F0_TOLUD 0xb0 34 #define D0F0_GBSM 0xa4 35 #define D0F0_BGSM 0xa8 36 #define D0F0_TSEG 0xac 37 #define D0F0_SKPD 0xdc /* Scratchpad Data */ 38 #define D0F0_CAPID0 0xe0 39 40 #endif /* __X4X_REGISTERS_HOSTBRIDGE_H__ */ 41