| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 4604 unsigned ExtOp, TruncOp; in PromoteNode() local 4637 unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND in PromoteNode() local 4653 unsigned ExtOp, TruncOp; in PromoteNode() local 4708 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local 4741 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local 4768 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 4330 unsigned ExtOp, TruncOp; in PromoteNode() local 4363 unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND in PromoteNode() local 4379 unsigned ExtOp, TruncOp; in PromoteNode() local 4420 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local 4433 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | BasicTTIImpl.h | 1377 unsigned ExtOp = variable 1441 unsigned ExtOp = variable
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 4095 unsigned ExtOp, TruncOp; in PromoteNode() local 4113 unsigned ExtOp, TruncOp; in PromoteNode() local 4153 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local 4166 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/ |
| D | BasicTTIImpl.h | 1972 unsigned ExtOp = in getTypeBasedIntrinsicInstrCost() local 2039 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt; in getTypeBasedIntrinsicInstrCost() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCodeGenPrepare.cpp | 401 Value *ExtOp = Builder.CreateZExt(I.getOperand(0), I32Ty); in promoteUniformBitreverseToI32() local
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| D | SIISelLowering.cpp | 9067 unsigned ExtOp = Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in performIntMed3ImmCombine() local
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 2186 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments() local 2312 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCodeGenPrepare.cpp | 435 Value *ExtOp = Builder.CreateZExt(I.getOperand(0), I32Ty); in promoteUniformBitreverseToI32() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 439 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP); in buildBoolExt() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 482 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP); in buildBoolExt() local
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| D | LegalizerHelper.cpp | 1917 auto ExtOp = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {TruncOp}); in widenScalarAddSubOverflow() local 1993 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in widenScalarMulo() local 7294 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in lowerSMULH_UMULH() local
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| /external/llvm/lib/Transforms/Scalar/ |
| D | IndVarSimplify.cpp | 1244 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/Utils/ |
| D | SimplifyIndVar.cpp | 1488 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonConstExtenders.cpp | 1534 MachineOperand ExtOp(EV); in insertInitializer() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| D | HexagonConstExtenders.cpp | 1535 MachineOperand ExtOp(EV); in insertInitializer() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | IndVarSimplify.cpp | 1396 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6063 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_64SVR4() local 6626 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_Darwin() local 13190 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1)); in combineBVOfVecSExt() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 5201 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_64SVR4() local 5769 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_Darwin() local
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| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 3782 Value *ExtOp, Value *IndexOp, in packTBLDVectorList()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6204 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_64SVR4() local 14412 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1)); in combineBVOfVecSExt() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 17787 SDValue ExtOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ExtVecVT, in InsertBitToMaskVector() local 35662 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local 35698 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local 35741 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ext0, Ext1); in SimplifyDemandedVectorEltsForTargetNode() local 37163 SDValue ExtOp = DAG.getNode(OpCode, dl, MVT::i32, SrcOp, in combineExtractWithShuffle() local 45788 unsigned ExtOp = getOpcode_EXTEND_VECTOR_INREG(InOpcode); in combineExtractSubvector() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 6782 SDValue ExtOp = DAG.getNode(ExtOpcode, SDLoc(N), ExtVT, Op); in combineINT_TO_FP() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 20252 SDValue ExtOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ExtVecVT, in InsertBitToMaskVector() local 42529 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local 42561 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local 42604 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ops); in SimplifyDemandedVectorEltsForTargetNode() local 55872 unsigned ExtOp = DAG.getOpcode_EXTEND_VECTOR_INREG(InOpcode); in combineEXTRACT_SUBVECTOR() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 8806 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE; in AddCombineToVPADDL() local
|