1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 3 #ifndef __PINEVIEW_HOSTBRIDGE_REGS_H__ 4 #define __PINEVIEW_HOSTBRIDGE_REGS_H__ 5 6 #define EPBAR 0x40 7 #define MCHBAR 0x48 8 9 #define GGC 0x52 /* GMCH Graphics Control */ 10 11 #define DEVEN 0x54 /* Device Enable */ 12 #define DEVEN_D0F0 (1 << 0) 13 #define DEVEN_D1F0 (1 << 1) 14 #define DEVEN_D2F0 (1 << 3) 15 #define DEVEN_D2F1 (1 << 4) 16 17 #ifndef BOARD_DEVEN 18 #define BOARD_DEVEN (DEVEN_D0F0 | DEVEN_D2F0 | DEVEN_D2F1) 19 #endif /* BOARD_DEVEN */ 20 21 #define PCIEXBAR 0x60 22 #define DMIBAR 0x68 23 #define PMIOBAR 0x78 24 25 #define PAM0 0x90 26 #define PAM1 0x91 27 #define PAM2 0x92 28 #define PAM3 0x93 29 #define PAM4 0x94 30 #define PAM5 0x95 31 #define PAM6 0x96 32 33 #define LAC 0x97 /* Legacy Access Control */ 34 #define REMAPBASE 0x98 35 #define REMAPLIMIT 0x9a 36 #define SMRAM 0x9d /* System Management RAM Control */ 37 #define ESMRAMC 0x9e /* Extended System Management RAM Control */ 38 39 #define TOM 0xa0 40 #define TOUUD 0xa2 41 #define GBSM 0xa4 42 #define BGSM 0xa8 43 #define TSEG 0xac 44 #define TOLUD 0xb0 /* Top of Low Used Memory */ 45 #define ERRSTS 0xc8 46 #define ERRCMD 0xca 47 #define SMICMD 0xcc 48 #define SCICMD 0xce 49 #define CGDIS 0xd8 50 #define SKPAD 0xdc /* Scratchpad Data */ 51 #define CAPID0 0xe0 52 #define DEV0T 0xf0 53 #define MSLCK 0xf4 54 #define MID0 0xf8 55 #define DEBUP0 0xfc 56 57 #endif /* __PINEVIEW_HOSTBRIDGE_REGS_H__ */ 58