Searched defs:IER (Results 1 – 8 of 8) sorted by relevance
| /external/coreboot/src/soc/intel/xeon_sp/ |
| D | smihandler.c | 15 uint8_t IER, IIR, MCR, LCR, DLL, DLM; member
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| /external/crosvm/devices/src/ |
| D | serial.rs | 41 const IER: u8 = 1; constant
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| /external/igt-gpu-tools/lib/ |
| D | intel_reg.h | 477 #define IER 0x20a0 /* p291 */ macro
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l4a6xx.h | 207 …__IO uint32_t IER; /*!< ADC interrupt enable register, Address offset: 0x… member
263 …__IO uint32_t IER; /*!< DCMI interrupt enable register, Address offset: 0x0C */ member
318 …__IO uint32_t IER; /*!< CAN interrupt enable register, Address … member
687 …__IO uint32_t IER; /*!< LPTIM Interrupt Enable register, Address offset… member
956 __IO uint32_t IER; /*!< SWPMI Interrupt Enable register, Address offset: 0x14 */ member
1023 …__IO uint32_t IER; /*!< TSC interrupt enable register, Addres… member
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l476xx.h | 197 …__IO uint32_t IER; /*!< ADC interrupt enable register, Address offset: 0x… member
290 …__IO uint32_t IER; /*!< CAN interrupt enable register, Address … member
618 …__IO uint32_t IER; /*!< LPTIM Interrupt Enable register, Address offset… member
883 __IO uint32_t IER; /*!< SWPMI Interrupt Enable register, Address offset: 0x14 */ member
949 …__IO uint32_t IER; /*!< TSC interrupt enable register, Addres… member
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| /external/coreboot/src/drivers/intel/gma/ |
| D | i915_reg.h | 521 #define IER 0x020a0 macro
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| /external/bcc/libbpf-tools/riscv/ |
| D | vmlinux_602.h | 104388 unsigned int IER; member
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| D | vmlinux.h | 104388 unsigned int IER; member
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