/external/sdv/vsomeip/third_party/boost/proto/example/ |
D | vector.cpp | 162 struct IsVector struct 167 struct IsVector<std::vector<T, A> > struct
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/external/flatbuffers/src/ |
D | bfbs_gen.h | 91 static bool IsVector(const reflection::BaseType base_type) { in IsVector() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | R600ExpandSpecialInstrs.cpp | 176 bool IsVector = TII->isVector(MI); in runOnMachineFunction() local
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/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
D | R600ExpandSpecialInstrs.cpp | 164 bool IsVector = TII->isVector(MI); in runOnMachineFunction() local
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D | AMDGPUInstructionSelector.cpp | 692 const bool IsVector = DstBank->getID() == AMDGPU::VGPRRegBankID; in selectG_BUILD_VECTOR() local
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/external/llvm/lib/Target/AMDGPU/ |
D | R600ExpandSpecialInstrs.cpp | 240 bool IsVector = TII->isVector(MI); in runOnMachineFunction() local
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/external/llvm/lib/Target/SystemZ/AsmParser/ |
D | SystemZAsmParser.cpp | 579 unsigned &Index, bool &IsVector, in parseAddress() 644 bool IsVector; in parseAddress() local 770 bool IsVector; in parseOperand() local
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/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/ |
D | Utils.cpp | 1289 bool llvm::isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector, in isConstTrueVal() 1303 bool IsVector, bool IsFP) { in isConstFalseVal() 1314 int64_t llvm::getICmpTrueVal(const TargetLowering &TLI, bool IsVector, in getICmpTrueVal()
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D | MachineIRBuilder.cpp | 488 bool IsVector, in buildBoolExtInReg()
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D | CombinerHelper.cpp | 2975 int64_t Cst, bool IsVector, bool IsFP) { in isConstValidTrue()
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/external/tensorflow/tensorflow/core/framework/ |
D | tensor_shape.h | 484 static bool IsVector(const TensorShape& shape) { return shape.dims() == 1; } in IsVector() function
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/external/lzma/CPP/7zip/Archive/ |
D | LvmHandler.cpp | 60 bool IsVector; member
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/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMELFStreamer.cpp | 1404 const SmallVectorImpl<unsigned> &RegList, bool IsVector, in collectHWRegs() 1427 bool IsVector) { in emitRegSave()
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/external/vixl/src/aarch64/ |
D | registers-aarch64.h | 225 bool IsVector() const { return HasLaneSize() && (size_ != lane_size_); } in IsVector() function
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/external/swiftshader/third_party/subzero/src/ |
D | IceInstARM32.cpp | 1907 const bool IsVector = isVectorType(Ty); in emitSingleDestSingleSource() local 2253 const bool IsVector = isVectorType(Ty); in emit() local 2281 const bool IsVector = isVectorType(Ty); in emit() local 2309 const bool IsVector = isVectorType(Ty); in emit() local
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/external/flatbuffers/include/flatbuffers/ |
D | idl.h | 144 inline bool IsVector (BaseType t) { return t == BASE_TYPE_VECTOR || in IsVector() function 541 inline bool IsVector(const Type &type) { return IsVector(type.base_type); } in IsVector() function
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D | flexbuffers.h | 431 bool IsVector() const { return type_ == FBT_VECTOR || type_ == FBT_MAP; } in IsVector() function
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMELFStreamer.cpp | 1329 bool IsVector) { in emitRegSave()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMELFStreamer.cpp | 1453 bool IsVector) { in emitRegSave()
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/external/flatbuffers/python/flatbuffers/ |
D | flexbuffers.py | 767 def IsVector(self): member in Ref
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 4433 bool IsVector = false; in parseDirectiveReq() local
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/external/clang/lib/CodeGen/ |
D | TargetInfo.cpp | 5939 bool IsVector = false; in EmitVAArg() local
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/external/swiftshader/third_party/llvm-16.0/llvm/lib/AsmParser/ |
D | LLParser.cpp | 3059 bool LLParser::parseArrayVectorType(Type *&Result, bool IsVector) { in parseArrayVectorType()
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 9717 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) { in parseDirectiveRegSave()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 11203 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) { in parseDirectiveRegSave()
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