1 /* 2 * Copyright (c) 2023-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef ERRATA_CPUSPEC_H 8 #define ERRATA_CPUSPEC_H 9 10 #include <stdint.h> 11 #include <arch.h> 12 #include <arch_helpers.h> 13 14 #if __aarch64__ 15 #include <cortex_a710.h> 16 #include <cortex_a78.h> 17 #include <cortex_a78_ae.h> 18 #include <cortex_a78c.h> 19 #include <cortex_x2.h> 20 #include <cortex_x3.h> 21 #include <cortex_x4.h> 22 #include <neoverse_n2.h> 23 #include <neoverse_v1.h> 24 #include <neoverse_v2.h> 25 #endif 26 27 /* Max number of platform based errata with no workaround in EL3 */ 28 #define MAX_PLAT_CPU_ERRATA_ENTRIES 2 29 30 #define ERRATA_LIST_END (MAX_PLAT_CPU_ERRATA_ENTRIES - 1) 31 32 /* Default values for unused memory in the array */ 33 #define UNDEF_ERRATA {UINT_MAX, UCHAR_MAX, UCHAR_MAX} 34 35 #define RXPX_RANGE(x, y, z) (((x >= y) && (x <= z)) ? true : false) 36 37 /* 38 * CPU specific values for errata handling 39 */ 40 struct em_cpu{ 41 unsigned int em_errata_id; 42 unsigned char em_rxpx_lo; /* lowest revision of errata applicable for the cpu */ 43 unsigned char em_rxpx_hi; /* highest revision of errata applicable for the cpu */ 44 }; 45 46 struct em_cpu_list{ 47 unsigned long cpu_midr; /* cpu specific part number is bit[15:4] of midr value */ 48 struct em_cpu cpu_errata_list[MAX_PLAT_CPU_ERRATA_ENTRIES]; 49 }; 50 51 int32_t verify_errata_implemented(uint32_t errata_id, uint32_t forward_flag); 52 #endif /* ERRATA_CPUSPEC_H */ 53