Home
last modified time | relevance | path

Searched defs:MISC_CTRL0_R_STBENCMP_DIV4CK_EN (Results 1 – 3 of 3) sorted by relevance

/external/coreboot/src/vendorcode/mediatek/mt8195/include/
D8195_Register_DDRPHY_AO.h1582 #define MISC_CTRL0_R_STBENCMP_DIV4CK_EN Fld(1, 31) //[31:31] macro
/external/coreboot/src/vendorcode/mediatek/mt8192/include/
DMargaux_Register_DDRPHY_AO.h1550 #define MISC_CTRL0_R_STBENCMP_DIV4CK_EN Fld(1, 31) //[31:31] macro
Dddrphy_wo_pll_reg.h755 #define MISC_CTRL0_R_STBENCMP_DIV4CK_EN BIT(31) macro