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Searched defs:MISC_SHU_MIDPI_CTRL_MIDPI_DIV4_ENABLE (Results 1 – 2 of 2) sorted by relevance

/external/coreboot/src/vendorcode/mediatek/mt8195/include/
D8195_Register_DDRPHY_AO.h3542 #define MISC_SHU_MIDPI_CTRL_MIDPI_DIV4_ENABLE Fld(1, 1) //[1:1] macro
/external/coreboot/src/vendorcode/mediatek/mt8192/include/
DMargaux_Register_DDRPHY_AO.h3453 #define MISC_SHU_MIDPI_CTRL_MIDPI_DIV4_ENABLE Fld(1, 1) //[1:1] macro