| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/ |
| D | Utils.cpp | 43 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
55 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
107 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
160 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands() local
199 MachineRegisterInfo &MRI) { in canReplaceReg()
213 const MachineRegisterInfo &MRI) { in isTriviallyDead()
289 const MachineRegisterInfo &MRI) { in getIConstantVRegVal()
300 llvm::getIConstantVRegSExtVal(Register VReg, const MachineRegisterInfo &MRI) { in getIConstantVRegSExtVal()
313 Register VReg, const MachineRegisterInfo &MRI, IsOpcodeFn IsConstantOpcode, in getConstantVRegValWithLookThrough()
410 Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs) { in getIConstantVRegValWithLookThrough()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | Utils.cpp | 30 unsigned llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
42 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
72 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
119 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands() local
159 const MachineRegisterInfo &MRI) { in isTriviallyDead()
208 const MachineRegisterInfo &MRI) { in getConstantVRegVal()
219 unsigned VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs, in getConstantVRegValWithLookThrough()
296 const MachineRegisterInfo &MRI) { in getConstantFPVRegVal()
304 const MachineRegisterInfo &MRI) { in getDefIgnoringCopies()
320 const MachineRegisterInfo &MRI) { in getOpcodeDef()
[all …]
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64PostLegalizerLowering.cpp | 222 static bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV()
251 static bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN()
272 static bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP()
288 static bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip()
306 MachineRegisterInfo &MRI, in matchDupFromInsertVectorElt()
345 MachineRegisterInfo &MRI, in matchDupFromBuildVector()
360 static bool matchDup(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDup()
406 static bool matchEXT(MachineInstr &MI, MachineRegisterInfo &MRI, in matchEXT()
471 static bool matchINS(MachineInstr &MI, MachineRegisterInfo &MRI, in matchINS()
498 static bool applyINS(MachineInstr &MI, MachineRegisterInfo &MRI, in applyINS()
[all …]
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| D | AArch64PostLegalizerCombiner.cpp | 54 MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtractVecEltPairwiseAdd()
97 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd()
113 static bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended()
119 static bool isZeroExtended(Register R, MachineRegisterInfo &MRI) { in isZeroExtended()
125 MachineInstr &MI, MachineRegisterInfo &MRI, in matchAArch64MulConstCombine()
238 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine()
248 bool matchFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchFoldMergeToZext()
256 void applyFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldMergeToZext()
269 static bool matchMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchMutateAnyExtToZExt()
286 static void applyMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI, in applyMutateAnyExtToZExt()
[all …]
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| D | AArch64GlobalISelUtils.cpp | 22 const MachineRegisterInfo &MRI) { in getAArch64VectorSplat()
36 const MachineRegisterInfo &MRI) { in getAArch64VectorSplatScalar()
45 const MachineRegisterInfo &MRI) { in isCMN()
67 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in tryEmitBZero() local
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| D | AArch64InstructionSelector.cpp | 681 auto &MRI = MF.getRegInfo(); in getImmedFromMO() local
706 const MachineRegisterInfo &MRI, in unsupportedBinOp()
859 static bool copySubReg(MachineInstr &I, MachineRegisterInfo &MRI, in copySubReg()
886 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, in getRegClassesForCopy()
913 static bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI, in selectDebugInstr()
943 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, in selectCopy()
1113 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect() local
1393 MachineRegisterInfo &MRI) { in getTestBitReg()
1529 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit() local
1602 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ() local
[all …]
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 350 MachineRegisterInfo &MRI = MF.getRegInfo(); in select() local
513 const MachineRegisterInfo &MRI, in X86SelectAddress()
539 MachineRegisterInfo &MRI, in selectLoadStoreOp()
599 MachineRegisterInfo &MRI, in selectFrameIndexOrGep()
627 MachineRegisterInfo &MRI, in selectGlobalValue()
673 MachineRegisterInfo &MRI, in selectConstant()
730 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
745 MachineRegisterInfo &MRI, in selectTruncOrPtrToInt()
811 MachineRegisterInfo &MRI, in selectZext()
876 MachineRegisterInfo &MRI, in selectAnyext()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 314 MachineRegisterInfo &MRI = MF.getRegInfo(); in select() local
474 const MachineRegisterInfo &MRI, in X86SelectAddress()
500 MachineRegisterInfo &MRI, in selectLoadStoreOp()
560 MachineRegisterInfo &MRI, in selectFrameIndexOrGep()
588 MachineRegisterInfo &MRI, in selectGlobalValue()
634 MachineRegisterInfo &MRI, in selectConstant()
691 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
706 MachineRegisterInfo &MRI, in selectTruncOrPtrToInt()
772 MachineRegisterInfo &MRI, in selectZext()
883 MachineRegisterInfo &MRI, in selectAnyext()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 88 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
131 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
145 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
178 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
215 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
230 MachineRegisterInfo *MRI = &MF->getRegInfo(); in removeLD() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 102 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
154 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
168 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
203 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
240 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
260 MachineRegisterInfo *MRI = &MF->getRegInfo(); in removeLD() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/Support/ |
| D | ModRef.h | 39 [[nodiscard]] inline bool isNoModRef(const ModRefInfo MRI) { in isNoModRef()
42 [[nodiscard]] inline bool isModOrRefSet(const ModRefInfo MRI) { in isModOrRefSet()
45 [[nodiscard]] inline bool isModAndRefSet(const ModRefInfo MRI) { in isModAndRefSet()
48 [[nodiscard]] inline bool isModSet(const ModRefInfo MRI) { in isModSet()
51 [[nodiscard]] inline bool isRefSet(const ModRefInfo MRI) { in isRefSet()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SPIRV/ |
| D | SPIRVPreLegalizer.cpp | 42 MachineRegisterInfo &MRI = MF.getRegInfo(); in addConstantsToTrack() local
97 MachineRegisterInfo &MRI = MF.getRegInfo(); in foldConstantsIntoIntrinsics() local
146 MachineRegisterInfo &MRI, in propagateSPIRVType()
197 MachineRegisterInfo &MRI) { in insertAssignInstr()
227 MachineRegisterInfo &MRI = MF.getRegInfo(); in generateAssignInstrs() local
303 createNewIdReg(Register ValReg, unsigned Opcode, MachineRegisterInfo &MRI, in createNewIdReg()
331 MachineRegisterInfo &MRI, SPIRVGlobalRegistry *GR) { in processInstr()
357 MachineRegisterInfo &MRI = MF.getRegInfo(); in processInstrsWithTypeFolding() local
422 MachineRegisterInfo &MRI = MF.getRegInfo(); in processSwitches() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.h | 28 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in MipsHandler()
43 MachineRegisterInfo &MRI; variable
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| D | MipsRegisterBankInfo.cpp | 173 Register Reg, const MachineRegisterInfo &MRI) { in addDefUses()
188 Register Reg, const MachineRegisterInfo &MRI) { in addUseDef()
199 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesOutgoing() local
213 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesIncoming() local
226 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); in AmbiguousRegDefUseContainer() local
341 const MachineRegisterInfo &MRI = MF.getRegInfo(); in setTypesAccordingToPhysicalRegister() local
406 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
669 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingImpl() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
| D | CodeGenCommonISel.cpp | 204 static MachineOperand *getSalvageOpsForCopy(const MachineRegisterInfo &MRI, in getSalvageOpsForCopy()
211 static MachineOperand *getSalvageOpsForTrunc(const MachineRegisterInfo &MRI, in getSalvageOpsForTrunc()
230 static MachineOperand *salvageDebugInfoImpl(const MachineRegisterInfo &MRI, in salvageDebugInfoImpl()
243 void llvm::salvageDebugInfoForDbgValue(const MachineRegisterInfo &MRI, in salvageDebugInfoForDbgValue()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | GCNRegPressure.cpp | 38 const MachineRegisterInfo &MRI) { in printLivesAt()
86 const MachineRegisterInfo &MRI) { in getRegKind()
100 const MachineRegisterInfo &MRI) { in inc()
199 const MachineRegisterInfo &MRI) { in getDefRegMask()
211 const MachineRegisterInfo &MRI, in getUsedRegMask()
231 const MachineRegisterInfo &MRI) { in collectVirtualRegUses()
259 const MachineRegisterInfo &MRI) { in getLiveLaneMask()
277 const MachineRegisterInfo &MRI) { in getLiveRegs()
498 const MachineRegisterInfo &MRI) { in printLiveRegs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAsmBackendDarwin.h | 18 const MCRegisterInfo &MRI; variable
22 const MCRegisterInfo &MRI, MachO::CPUSubTypeARM st) in ARMAsmBackendDarwin()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAsmBackendDarwin.h | 18 const MCRegisterInfo &MRI; variable
23 const MCRegisterInfo &MRI) in ARMAsmBackendDarwin()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAsmBackendDarwin.h | 18 const MCRegisterInfo &MRI; variable
22 const MCRegisterInfo &MRI, MachO::CPUSubTypeARM st) in ARMAsmBackendDarwin()
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/GISel/ |
| D | PPCCallLowering.h | 42 MachineRegisterInfo &MRI) in PPCIncomingValueHandler()
66 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
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| D | PPCRegisterBankInfo.cpp | 73 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
239 const MachineRegisterInfo &MRI, in hasFPConstraints()
279 const MachineRegisterInfo &MRI, in onlyUsesFP()
298 const MachineRegisterInfo &MRI, in onlyDefinesFP()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUInstPrinter.h | 22 const MCInstrInfo &MII, const MCRegisterInfo &MRI) in AMDGPUInstPrinter()
240 const MCRegisterInfo &MRI) in R600InstPrinter()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| D | MipsRegisterBankInfo.cpp | 180 Register Reg, const MachineRegisterInfo &MRI) { in addDefUses()
195 Register Reg, const MachineRegisterInfo &MRI) { in addUseDef()
206 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesOutgoing() local
220 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesIncoming() local
233 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); in AmbiguousRegDefUseContainer() local
367 const MachineRegisterInfo &MRI = MF.getRegInfo(); in setTypesAccordingToPhysicalRegister() local
433 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
731 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingImpl() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| D | GCNRegPressure.cpp | 39 const MachineRegisterInfo &MRI) { in getRegKind()
53 const MachineRegisterInfo &MRI) { in inc()
159 const MachineRegisterInfo &MRI) { in getDefRegMask()
171 const MachineRegisterInfo &MRI, in getUsedRegMask()
191 const MachineRegisterInfo &MRI) { in collectVirtualRegUses()
218 const MachineRegisterInfo &MRI) { in getLiveLaneMask()
236 const MachineRegisterInfo &MRI) { in getLiveRegs()
457 const MachineRegisterInfo &MRI) { in print()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | CSEInfo.h | 77 MachineRegisterInfo *MRI = nullptr; variable
169 const MachineRegisterInfo &MRI; variable
172 GISelInstProfileBuilder(FoldingSetNodeID &ID, const MachineRegisterInfo &MRI) in GISelInstProfileBuilder()
|