| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/Support/ |
| D | MathExtras.h | 374 inline bool isShiftedMask_32(uint32_t Value, unsigned &MaskIdx, in isShiftedMask_32()
387 inline bool isShiftedMask_64(uint64_t Value, unsigned &MaskIdx, in isShiftedMask_64()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/VE/ |
| D | VVPISelLowering.cpp | 68 auto MaskIdx = ISD::getVPMaskIdx(Opcode); in lowerToVVP() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 2130 unsigned MaskIdx = SrcIdx + 1 + X86::AddrDisp; in addConstantComments() local
2208 unsigned MaskIdx = SrcIdx + 1 + X86::AddrDisp; in addConstantComments() local
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| D | X86InstCombineIntrinsic.cpp | 999 unsigned MaskIdx, MaskLen; in instCombineIntrinsic() local
1043 unsigned MaskIdx, MaskLen; in instCombineIntrinsic() local
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| D | X86ISelLowering.cpp | 12008 int MaskIdx = Mask[i]; in isShuffleEquivalent() local
12057 int MaskIdx = Mask[i]; in isTargetShuffleEquivalent() local
45198 SDValue MaskIdx = DAG.getZExtOrTrunc(Use->getOperand(1), dl, MVT::i8); in combineExtractVectorElt() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 2275 unsigned SrcIdx, MaskIdx; in EmitInstruction() local
2333 unsigned SrcIdx, MaskIdx; in EmitInstruction() local
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| D | X86ISelLowering.cpp | 37501 unsigned MaskIdx = Use->getConstantOperandVal(1); in combineExtractVectorElt() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
| D | ComplexDeinterleavingPass.cpp | 351 int MaskIdx = Idx * 2; in isInterleavingMask() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/ADT/ |
| D | APInt.h | 510 bool isShiftedMask(unsigned &MaskIdx, unsigned &MaskLen) const { in isShiftedMask()
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 1444 unsigned SrcIdx, MaskIdx; in EmitInstruction() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/ |
| D | LoongArchISelLowering.cpp | 1406 unsigned MaskIdx, MaskLen; in performSRLCombine() local
1565 unsigned MaskIdx, MaskLen; in performORCombine() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 1822 const SDValue &MaskIdx = Op.getOperand(OpIdx + 1); in LowerIntrinsic() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2022 uint64_t MaskIdx = 0; in LowerVECTOR_SHUFFLE() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2276 uint64_t MaskIdx = 0; in LowerVECTOR_SHUFFLE() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 3280 unsigned MaskIdx, MaskLen; in performSrlCombine() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 298 auto MaskIdx = [&](Value* Idx){ in foldCmpLoadFromIndexedGlobal() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 2571 int MaskIdx = MaskElt / NewElts; in SplitVecRes_VECTOR_SHUFFLE() local
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| D | DAGCombiner.cpp | 24792 if (auto MaskIdx = ISD::getVPMaskIdx(N->getOpcode())) in visitVPOp() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 3386 bool IsSelect = all_of(enumerate(Mask), [&](const auto &MaskIdx) { in lowerVECTOR_SHUFFLE()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 13698 unsigned MaskIdx, MaskLen; in isDesirableToCommuteXorWithShift() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 14971 unsigned MaskIdx, MaskLen; in isDesirableToCommuteXorWithShift() local
|