| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 1109 SDValue N01 = N0.getOperand(1); in reassociateOpsCommutative() local
2463 SDValue N01 = N0.getOperand(1); in visitADDLike() local
2495 SDValue N01 = N0.getOperand(1); in visitADDLike() local
2577 SDValue N01 = N0.getOperand(1); in visitADDLike() local
3552 SDValue N01 = N0.getOperand(1); in visitSUB() local
3566 SDValue N01 = N0.getOperand(1); in visitSUB() local
4139 SDValue N01 = N0.getOperand(1); in visitMUL() local
5135 SDValue N00, N01, N02, N03; in isSaturatingMinMax() local
6964 SDValue N01 = N0.getOperand(1); in MatchBSwapHWord() local
7051 SDValue N01 = N0.getOperand(1); in visitORCommutative() local
[all …]
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 1712 SDValue N01 = N0.getOperand(1); in visitADD() local
3556 SDValue N01 = N0.getOperand(1); in MatchBSwapHWord() local
4370 SDValue N01 = N->getOperand(0).getOperand(1); in distributeTruncateThroughAnd() local
4420 SDValue N01 = N0->getOperand(1); in visitSHL() local
6789 ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1)); in ReduceLoadWidth() local
6806 if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in ReduceLoadWidth() local
6838 if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in ReduceLoadWidth() local
8002 SDValue N01 = N0.getOperand(0).getOperand(1); in visitFSUBForFMACombine() local
8552 SDValue N01 = N0.getOperand(1); in visitFMUL() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 2223 SDValue N01 = N0.getOperand(1); in visitADDLike() local
5688 SDValue N01 = N0.getOperand(1); in MatchBSwapHWord() local
7092 SDValue N00 = N0.getOperand(0), N01 = N0.getOperand(1); in visitXOR() local
7104 SDValue N00 = N0.getOperand(0), N01 = N0.getOperand(1); in visitXOR() local
7374 SDValue N01 = N->getOperand(0).getOperand(1); in distributeTruncateThroughAnd() local
7468 SDValue N01 = N0->getOperand(1); in visitSHL() local
9736 SDValue N01 = N0.getOperand(1); in visitSIGN_EXTEND() local
10384 auto *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1)); in ReduceLoadWidth() local
10471 if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in ReduceLoadWidth() local
11795 SDValue N01 = N0.getOperand(0).getOperand(1); in visitFSUBForFMACombine() local
[all …]
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelDAGToDAG.cpp | 2608 SDValue N01 = N0.getOperand(1); in doPeepholeSExtW() local
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| D | RISCVISelLowering.cpp | 8521 SDValue N01 = N0.getOperand(1); in combineDeMorganOfBoolean() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 3385 SDValue N01 = N0->getOperand(1); in matchBitExtract() local
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| D | X86ISelLowering.cpp | 39428 SDValue N01 = N0.getOperand(1); in combineShiftRightArithmetic() local
42270 SDValue N01 = N0.getOperand(1); in detectPMADDUBSW() local
43662 SDValue N01 = N0.getOperand(1); in combineZext() local
45039 SDValue N01 = N0.getOperand(1); in matchPMADDWD_2() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 3642 SDValue N01 = N0->getOperand(1); in matchBitExtract() local
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| D | X86ISelLowering.cpp | 47835 SDValue N01 = N0.getOperand(1); in combineShiftRightArithmetic() local
48784 SDValue N01 = N0.getOperand(1); in convertIntLogicToFPLogic() local
49657 SDValue N01 = N0->getOperand(1); in foldMaskedMerge() local
51737 SDValue N01 = N0.getOperand(1); in detectPMADDUBSW() local
53195 SDValue N01 = N0.getOperand(1); in combineZext() local
54725 SDValue N01 = N0.getOperand(1); in matchPMADDWD_2() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6701 SDValue N01 = SkipExtensionForVMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL() local
9131 SDValue N01 = N0->getOperand(1); in PerformVMULCombine() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 4655 SDValue N01 = skipExtensionForVectorMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL() local
16579 SDValue N01 = N0->getOperand(IsStrict ? 2 : 1); in performExtractVectorEltCombine() local
16743 SDValue N01 = N0->getOperand(1); in performConcatVectorsCombine() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 8633 SDValue N01 = SkipExtensionForVMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL() local
11981 SDValue N01 = N0->getOperand(1); in PerformVMULCombine() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2271 SDValue N01 = skipExtensionForVectorMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 9607 SDValue N01 = SkipExtensionForVMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL() local
13986 SDValue N01 = N0->getOperand(1); in PerformVMULCombine() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2933 SDValue N01 = skipExtensionForVectorMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 27768 SDValue N01 = N0.getOperand(1); in combineShiftRightAlgebraic() local
27973 SDValue N01 = N0->getOperand(1); in combineANDXORWithAllOnesIntoANDNP() local
|