1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef _SOC_DENVERTON_NS_GPIO_H_ 4 #define _SOC_DENVERTON_NS_GPIO_H_ 5 6 #include <soc/gpio_defs.h> 7 8 #define GPIO_MISCCFG 0x10 /* Miscellaneous Configuration offset */ 9 10 #define GPIO_MAX_NUM_PER_GROUP 32 11 12 #define NUM_NC_GPI_REGS \ 13 (ALIGN_UP(V_PCH_GPIO_NC_PAD_MAX, GPIO_MAX_NUM_PER_GROUP) \ 14 / GPIO_MAX_NUM_PER_GROUP) 15 16 #define NUM_SC_DFX_GPI_REGS \ 17 (ALIGN_UP(V_PCH_GPIO_SC_DFX_PAD_MAX, GPIO_MAX_NUM_PER_GROUP) \ 18 / GPIO_MAX_NUM_PER_GROUP) 19 20 #define NUM_SC0_GPI_REGS \ 21 (ALIGN_UP(V_PCH_GPIO_SC0_PAD_MAX, GPIO_MAX_NUM_PER_GROUP) \ 22 / GPIO_MAX_NUM_PER_GROUP) 23 24 #define NUM_SC1_GPI_REGS \ 25 (ALIGN_UP(V_PCH_GPIO_SC1_PAD_MAX, GPIO_MAX_NUM_PER_GROUP) \ 26 / GPIO_MAX_NUM_PER_GROUP) 27 28 #define NUM_GPI_STATUS_REGS (NUM_NC_GPI_REGS + NUM_SC_DFX_GPI_REGS +\ 29 NUM_SC0_GPI_REGS + NUM_SC1_GPI_REGS) 30 31 #define GPIO_NUM_PAD_CFG_REGS 2 /* DW0, DW1 */ 32 33 #include <intelblocks/gpio.h>/* intelblocks/gpio.h depends on definitions in 34 lines above and soc/gpio_defs.h */ 35 36 /* 37 * DNV doesn't support dynamic GPIO PM hence GPIO community 38 * MISCCFG register doesn't have PM bits 39 */ 40 #define MISCCFG_GPIO_PM_CONFIG_BITS 0 41 42 #endif /* _SOC_DENVERTON_NS_GPIO_H_ */ 43