1# Copyright © 2024 Imagination Technologies Ltd. 2# SPDX-License-Identifier: MIT 3 4from pco_pygen_common import * 5 6OP_TYPE = enum_type('op_type', [ 7 'pseudo', 8 'hw', 9 'hw_direct', 10]) 11 12MOD_TYPE = enum_type('mod_type', [ 13 'bool', 14 'uint', 15 'enum', 16]) 17 18REF_TYPE = enum_type('ref_type', [ 19 ('null', '_'), 20 ('ssa', '%'), 21 ('reg', ''), 22 ('idx_reg', ''), 23 ('imm', ''), 24 ('io', ''), 25 ('pred', ''), 26 ('drc', 'drc'), 27]) 28 29FUNC_TYPE = enum_type('func_type', [ 30 'callable', 31 'preamble', 32 'entrypoint', 33 'phase_change', 34]) 35 36DTYPE = enum_type('dtype', [ 37 ('any', ''), 38 ('unsigned', 'u'), 39 ('signed', 'i'), 40 ('float', 'f'), 41]) 42 43BITS = enum_type('bits', [ 44 ('1', '1'), 45 ('8', '8'), 46 ('16', '16'), 47 ('32', '32'), 48 ('64', '64'), 49]) 50 51REG_CLASS = enum_type('reg_class', [ 52 ('virt', '$'), 53 ('temp', 'r'), 54 ('vtxin', 'vi'), 55 ('coeff', 'cf'), 56 ('shared', 'sh'), 57 ('index', 'idx'), 58 ('spec', 'sr'), 59 ('intern', 'i'), 60 ('const', 'sc'), 61 ('pixout', 'po'), 62 ('global', 'g'), 63 ('slot', 'sl'), 64]) 65 66IO = enum_type('io', [ 67 ('s0', 's0'), 68 ('s1', 's1'), 69 ('s2', 's2'), 70 71 ('s3', 's3'), 72 ('s4', 's4'), 73 ('s5', 's5'), 74 75 ('w0', 'w0'), 76 ('w1', 'w1'), 77 78 ('is0', 'is0'), 79 ('is1', 'is1'), 80 ('is2', 'is2'), 81 ('is3', 'is3'), 82 ('is4', 'is4'), 83 ('is5', 'is5'), 84 85 ('ft0', 'ft0'), 86 ('ft0h', 'ft0h'), 87 ('ft1', 'ft1'), 88 ('ft2', 'ft2'), 89 ('fte', 'fte'), 90 91 ('ft1_invert', '~ft1'), 92 ('ft3', 'ft3'), 93 ('ft4', 'ft4'), 94 ('ft5', 'ft5'), 95 96 ('ftt', 'ftt'), 97 98 ('cout', 'cout'), 99]) 100 101PRED = enum_type('pred', [ 102 ('pe', 'pe'), 103 ('p0', 'p0'), 104 105 ('always', 'if(1)'), 106 ('p0_true', 'if(p0)'), 107 ('never', 'if(0)'), 108 ('p0_false', 'if(!p0)'), 109]) 110 111DRC = enum_type('drc', [ 112 ('0', '0'), 113 ('1', '1'), 114 ('pending', '?'), 115]) 116 117# Ref mods. 118RM_ONEMINUS = ref_mod('oneminus', BaseType.bool) 119RM_CLAMP = ref_mod('clamp', BaseType.bool) 120RM_ABS = ref_mod('abs', BaseType.bool) 121RM_NEG = ref_mod('neg', BaseType.bool) 122RM_FLR = ref_mod('flr', BaseType.bool) 123 124RM_ELEM = ref_mod_enum('elem', [ 125 'e0', 126 'e1', 127 'e2', 128 'e3', 129], is_bitset=True) 130 131# Op mods. 132OM_EXEC_CND = op_mod_enum('exec_cnd', [ 133 ('e1_zx', ''), 134 ('e1_z1', 'if(p0)'), 135 ('ex_zx', '(ignorepe)'), 136 ('e1_z0', 'if(!p0)'), 137], print_early=True, unset=True) 138OM_RPT = op_mod('rpt', BaseType.uint, print_early=True, nzdefault=1, unset=True) 139OM_SAT = op_mod('sat', BaseType.bool) 140OM_LP = op_mod('lp', BaseType.bool) 141OM_SCALE = op_mod('scale', BaseType.bool) 142OM_ROUNDZERO = op_mod('roundzero', BaseType.bool) 143OM_S = op_mod('s', BaseType.bool) 144OM_TST_OP_MAIN = op_mod_enum('tst_op_main', [ 145 ('zero', 'z'), 146 ('gzero', 'gz'), 147 ('gezero', 'gez'), 148 ('carry', 'c'), 149 ('equal', 'e'), 150 ('greater', 'g'), 151 ('gequal', 'ge'), 152 ('notequal', 'ne'), 153 ('less', 'l'), 154 ('lequal', 'le'), 155]) 156OM_TST_OP_BITWISE = op_mod_enum('tst_op_bitwise', [ 157 ('zero', 'z'), 158 ('nonzero', 'nz'), 159]) 160OM_SIGNPOS = op_mod_enum('signpos', [ 161 'twb', 162 'pwb', 163 'mtb', 164 'ftb', 165]) 166OM_DIM = op_mod('dim', BaseType.uint) 167OM_PROJ = op_mod('proj', BaseType.bool) 168OM_FCNORM = op_mod('fcnorm', BaseType.bool) 169OM_NNCOORDS = op_mod('nncoords', BaseType.bool) 170OM_LOD_MODE = op_mod_enum('lod_mode', [ 171 ('normal', ''), 172 ('bias', '.bias'), 173 ('replace', '.replace'), 174 ('gradient', '.gradient'), 175]) 176OM_PPLOD = op_mod('pplod', BaseType.bool) 177OM_TAO = op_mod('tao', BaseType.bool) 178OM_SOO = op_mod('soo', BaseType.bool) 179OM_SNO = op_mod('sno', BaseType.bool) 180OM_WRT = op_mod('wrt', BaseType.bool) 181OM_SB_MODE = op_mod_enum('sb_mode', [ 182 ('none', ''), 183 ('data', '.data'), 184 ('info', '.info'), 185 ('both', '.both'), 186]) 187OM_ARRAY = op_mod('array', BaseType.bool) 188OM_INTEGER = op_mod('integer', BaseType.bool) 189OM_SCHEDSWAP = op_mod('schedswap', BaseType.bool) 190OM_F16 = op_mod('f16', BaseType.bool) 191OM_TILED = op_mod('tiled', BaseType.bool) 192OM_FREEP = op_mod('freep', BaseType.bool) 193OM_SM = op_mod('sm', BaseType.bool) 194OM_SAVMSK_MODE = op_mod_enum('savmsk_mode', [ 195 'vm', 196 'icm', 197 'icmoc', 198 'icmi', 199 'caxy', 200]) 201OM_ATOM_OP = op_mod_enum('atom_op', [ 202 'add', 203 'sub', 204 'xchg', 205 'umin', 206 'imin', 207 'umax', 208 'imax', 209 'and', 210 'or', 211 'xor', 212]) 213OM_MCU_CACHE_MODE_LD = op_mod_enum('mcu_cache_mode_ld', [ 214 ('normal', ''), 215 ('bypass', '.bypass'), 216 ('force_line_fill', '.forcelinefill'), 217]) 218OM_MCU_CACHE_MODE_ST = op_mod_enum('mcu_cache_mode_st', [ 219 ('write_through', '.writethrough'), 220 ('write_back', '.writeback'), 221 ('lazy_write_back', '.lazywriteback'), 222]) 223OM_BRANCH_CND = op_mod_enum('branch_cnd', [ 224 ('exec_cond', ''), 225 ('allinst', '.allinst'), 226 ('anyinst', '.anyinst'), 227]) 228OM_LINK = op_mod('link', BaseType.bool) 229OM_PCK_FMT = op_mod_enum('pck_fmt', [ 230 'u8888', 231 's8888', 232 'o8888', 233 'u1616', 234 's1616', 235 'o1616', 236 'u32', 237 's32', 238 'u1010102', 239 's1010102', 240 'u111110', 241 's111110', 242 'f111110', 243 'f16f16', 244 'f32', 245 'cov', 246 'u565u565', 247 'd24s8', 248 's8d24', 249 'f32_mask', 250 '2f10f10f10', 251 's8888ogl', 252 's1616ogl', 253 'zero', 254 'one', 255]) 256OM_PHASE2END = op_mod('phase2end', BaseType.bool) 257OM_ITR_MODE = op_mod_enum('itr_mode', [ 258 'pixel', 259 'sample', 260 'centroid', 261]) 262OM_SCHED = op_mod_enum('sched', [ 263 'none', 264 'swap', 265 'wdf', 266]) 267OM_ATOM = op_mod('atom', BaseType.bool, unset=True) 268OM_OLCHK = op_mod('olchk', BaseType.bool, unset=True) 269OM_END = op_mod('end', BaseType.bool, unset=True) 270 271# Ops. 272 273OM_ALU = [OM_OLCHK, OM_EXEC_CND, OM_END, OM_ATOM, OM_RPT] 274OM_ALU_RPT1 = [OM_OLCHK, OM_EXEC_CND, OM_END, OM_ATOM, OM_RPT] 275 276## Main. 277O_FADD = hw_op('fadd', OM_ALU + [OM_SAT], 1, 2, [], [[RM_ABS, RM_NEG, RM_FLR], [RM_ABS]]) 278O_FMUL = hw_op('fmul', OM_ALU + [OM_SAT], 1, 2, [], [[RM_ABS, RM_NEG, RM_FLR], [RM_ABS]]) 279O_FMAD = hw_op('fmad', OM_ALU + [OM_SAT, OM_LP], 1, 3, [], [[RM_ABS, RM_NEG], [RM_ABS, RM_NEG], [RM_ABS, RM_NEG, RM_FLR]]) 280O_MBYP0 = hw_op('mbyp0', OM_ALU, 1, 1, [], [[RM_ABS, RM_NEG]]) 281O_PCK = hw_op('pck', OM_ALU + [OM_PCK_FMT, OM_ROUNDZERO, OM_SCALE], 1, 1) 282 283# TODO 284# O_PCK_ELEM = pseudo_op('pck.elem', OM_ALU_RPT1 + [OM_PCK_FMT, OM_ROUNDZERO, OM_SCALE], 1, 2) 285 286## Backend. 287O_UVSW_WRITE = hw_op('uvsw.write', [OM_EXEC_CND, OM_RPT], 0, 2) 288O_UVSW_EMIT = hw_op('uvsw.emit', [OM_EXEC_CND]) 289O_UVSW_ENDTASK = hw_op('uvsw.endtask', [OM_END]) 290O_UVSW_EMIT_ENDTASK = hw_op('uvsw.emit.endtask', [OM_END]) 291O_UVSW_WRITE_EMIT_ENDTASK = hw_op('uvsw.write.emit.endtask', [OM_END], 0, 2) 292 293O_FITR = hw_op('fitr', OM_ALU + [OM_ITR_MODE, OM_SAT], 1, 3) 294O_FITRP = hw_op('fitrp', OM_ALU + [OM_ITR_MODE, OM_SAT], 1, 4) 295 296## Bitwise. 297O_BBYP0BM = hw_direct_op('bbyp0bm', 2, 2) 298 299O_MOVI32 = pseudo_op('movi32', OM_ALU, 1, 1) 300 301## Control. 302O_WOP = hw_op('wop') 303O_WDF = hw_op('wdf', [], 0, 1) 304O_NOP = hw_op('nop', [OM_EXEC_CND]) 305O_NOP_END = hw_op('nop.end', [OM_EXEC_CND]) 306 307# TODO NEXT: gate usage of OM_F16! 308O_DITR = hw_op('ditr', [OM_EXEC_CND, OM_ITR_MODE, OM_SAT, OM_SCHED, OM_F16], 1, 3) 309O_DITRP = hw_op('ditrp', [OM_EXEC_CND, OM_ITR_MODE, OM_SAT, OM_SCHED, OM_F16], 1, 4) 310O_DITRP_WRITE = hw_op('ditrp.write', [OM_EXEC_CND, OM_ITR_MODE, OM_SAT, OM_SCHED, OM_F16], 1, 4) 311O_DITRP_READ = hw_op('ditrp.read', [OM_EXEC_CND, OM_ITR_MODE, OM_SAT, OM_SCHED, OM_F16], 1, 3) 312 313# Pseudo-ops (unmapped). 314O_NEG = pseudo_op('neg', OM_ALU, 1, 1) 315O_ABS = pseudo_op('abs', OM_ALU, 1, 1) 316O_FLR = pseudo_op('flr', OM_ALU, 1, 1) 317O_MOV = pseudo_op('mov', OM_ALU, 1, 1) 318O_VEC = pseudo_op('vec', [], 1, VARIABLE, [], [[RM_ABS, RM_NEG]]) 319O_COMP = pseudo_op('comp', [], 1, 2) 320