| /external/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 667 int OffsetImm = getLdStOffsetOp(*RtMI).getImm(); in mergeNarrowInsns() local
856 int OffsetImm = getLdStOffsetOp(*RtMI).getImm(); in mergePairedInsns() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 710 int OffsetImm = getLdStOffsetOp(*RtMI).getImm(); in mergeNarrowZeroStores() local
909 int OffsetImm = getLdStOffsetOp(*RtMI).getImm(); in mergePairedInsns() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 758 int OffsetImm = AArch64InstrInfo::getLdStOffsetOp(*RtMI).getImm(); in mergeNarrowZeroStores() local
961 int OffsetImm = AArch64InstrInfo::getLdStOffsetOp(*RtMI).getImm(); in mergePairedInsns() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 211 const MachineOperand *OffsetImm = in getMemOpBaseRegImmOfs() local
269 const MachineOperand *OffsetImm = in getMemOpBaseRegImmOfs() local
277 const MachineOperand *OffsetImm = in getMemOpBaseRegImmOfs() local
|
| /external/llvm/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 541 unsigned OffsetImm = 0; in ReduceLoadStore() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 578 unsigned OffsetImm = 0; in ReduceLoadStore() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 570 unsigned OffsetImm = 0; in ReduceLoadStore() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 271 const MachineOperand *OffsetImm = in getMemOperandWithOffset() local
340 const MachineOperand *OffsetImm = in getMemOperandWithOffset() local
351 const MachineOperand *OffsetImm = in getMemOperandWithOffset() local
365 const MachineOperand *OffsetImm = in getMemOperandWithOffset() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 2546 int64_t OffsetImm = 0; in foldFrameOffset() local
2649 int64_t &OffsetImm, in isImmInstrEligibleForFolding()
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 3599 int64_t OffsetImm = 0; in foldFrameOffset() local
3713 int64_t &OffsetImm, in isImmInstrEligibleForFolding()
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 513 const MCConstantExpr *OffsetImm; // Offset immediate value member
2803 CreateMem(unsigned BaseRegNum, const MCConstantExpr *OffsetImm, in CreateMem()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 784 const MCConstantExpr *OffsetImm; // Offset immediate value member
3625 CreateMem(unsigned BaseRegNum, const MCConstantExpr *OffsetImm, in CreateMem()
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 860 const MCExpr *OffsetImm; // Offset immediate value member
3813 CreateMem(unsigned BaseRegNum, const MCExpr *OffsetImm, unsigned OffsetRegNum, in CreateMem()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringMIPS32.cpp | 5304 int32_t OffsetImm = 0; in formAddressingMode() local
|
| D | IceTargetLoweringARM32.cpp | 5567 int32_t OffsetImm = 0; in formAddressingMode() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 376 const MachineOperand *OffsetImm = in getMemOperandsWithOffsetWidth() local
|