1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef __SOC_NVIDIA_TEGRA_PINGROUP_H__ 4 #define __SOC_NVIDIA_TEGRA_PINGROUP_H__ 5 6 #include <stdint.h> 7 8 void pingroup_set_config(int group_index, uint32_t config); 9 uint32_t pingroup_get_config(int group_index); 10 11 enum { 12 PINGROUP_HSM = 1 << 2, 13 PINGROUP_SCHMT = 1 << 3, 14 PINGROUP_LPMD_SHIFT = 4, 15 PINGROUP_LPMD_MASK = 3 << 4, 16 PINGROUP_DRVDN_SHIFT = 12, 17 PINGROUP_DRVDN_MASK = 0x7f << 12, 18 PINGROUP_DRVUP_SHIFT = 20, 19 PINGROUP_DRVUP_MASK = 0x7f << 20, 20 PINGROUP_SLWR_SHIFT = 28, 21 PINGROUP_SLWR_MASK = 0x3 << 28, 22 PINGROUP_SLWF_SHIFT = 30, 23 PINGROUP_SLWF_MASK = 0x3 << 30 24 }; 25 26 #endif /* __SOC_NVIDIA_TEGRA_PINGROUP_H__ */ 27