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Searched defs:RB (Results 1 – 25 of 53) sorted by relevance

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/external/sdv/vsomeip/third_party/boost/numeric/ublas/test/
Dtest_assignment.cpp170 V B(3,3), RB(3,3); in test_matrix() local
179 V B(3,3), RB(3,3); in test_matrix() local
188 V B(3,3), RB(3,3); in test_matrix() local
197 V B(4,4), RB(4,4); in test_matrix() local
211 V B(4,4), RB(4,4); in test_matrix() local
224 V B(4,4), RB(4,4); in test_matrix() local
237 V B(4,4), RB(4,4); in test_matrix() local
250 V B(4,4), RB(4,4); in test_matrix() local
261 V B(4,4), RB(4,4); in test_matrix() local
272 V B(4,4), RB(4,4); in test_matrix() local
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/external/clang/lib/Rewrite/
DHTMLRewrite.cpp57 void html::HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E, in HighlightRange()
115 RewriteBuffer &RB = R.getEditBuffer(FID); in EscapeText() local
208 static void AddLineNumber(RewriteBuffer &RB, unsigned LineNo, in AddLineNumber()
232 RewriteBuffer &RB = R.getEditBuffer(FID); in AddLineNumbers() local
358 RewriteBuffer &RB = R.getEditBuffer(FID); in SyntaxHighlight() local
DRewriter.cpp143 const RewriteBuffer &RB = I->second; in getRangeSize() local
195 const RewriteBuffer &RB = I->second; in getRewrittenText() local
381 RewriteBuffer &RB = getEditBuffer(FID); in IncreaseIndentation() local
/external/scudo/standalone/
Dcombined.h191 AllocationRingBuffer *RB = getRingBuffer(); in enableRingBuffer() local
199 AllocationRingBuffer *RB = getRingBuffer(); in disableRingBuffer() local
849 AllocationRingBuffer *RB = getRingBuffer(); in getStackDepotAddress() local
855 AllocationRingBuffer *RB = getRingBuffer(); in getStackDepotSize() local
874 AllocationRingBuffer *RB = getRingBuffer(); in getRingBufferSize() local
1403 AllocationRingBuffer *RB = getRingBuffer(); in storePrimaryAllocationStackMaybe() local
1411 void storeRingBufferEntry(AllocationRingBuffer *RB, void *Ptr, in storeRingBufferEntry()
1440 AllocationRingBuffer *RB = getRingBuffer(); in storeSecondaryAllocationStackMaybe() local
1457 AllocationRingBuffer *RB = getRingBuffer(); in storeDeallocationStackMaybe() local
1644 getRingBufferEntry(AllocationRingBuffer *RB, uptr N) { in getRingBufferEntry()
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/external/linux-kselftest/tools/testing/selftests/powerpc/include/
Dinstructions.h9 #define __COPY(RA, RB, L) \ argument
11 #define COPY(RA, RB, L) \ argument
33 #define __PASTE(RA, RB, L, RC) \ argument
35 #define PASTE(RA, RB, L, RC) \ argument
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/
DPPCExpandAtomicPseudoInsts.cpp156 Register RB = MI.getOperand(3).getReg(); in expandAtomicRMW128() local
233 Register RB = MI.getOperand(3).getReg(); in expandAtomicCmpSwap128() local
/external/clang/lib/Frontend/Rewrite/
DRewriteMacros.cpp95 RewriteBuffer &RB = Rewrite.getEditBuffer(SM.getMainFileID()); in RewriteMacrosInInput() local
/external/pytorch/aten/src/ATen/native/ao_sparse/quantized/cpu/
Dqlinear_serialize.cpp40 const int64_t RB, in pack_bcsr()
Dqlinear_deserialize.cpp46 const int64_t RB, in unpack_bcsr()
/external/clang/test/Layout/
Dms-x86-alias-avoidance-padding.cpp302 struct RB { char c; }; struct
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/GISel/
DPPCRegisterBankInfo.cpp257 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); in hasFPConstraints() local
DPPCInstructionSelector.cpp98 static const TargetRegisterClass *getRegClass(LLT Ty, const RegisterBank *RB) { in getRegClass()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp332 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, in getRegClassForTypeOnBank()
363 getMinClassForRegBank(const RegisterBank &RB, unsigned SizeInBits, in getMinClassForRegBank()
1011 const RegisterBank &RB = *RBI.getRegBank(LHS, MRI, TRI); in selectCompareBranch() local
1442 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in select() local
1593 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
1851 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); in select() local
1924 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
1968 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
2811 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI); in selectMergeValues() local
3208 getInsertVecEltOpInfo(const RegisterBank &RB, unsigned EltSize) { in getInsertVecEltOpInfo()
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DAArch64RegisterBankInfo.cpp95 #define CHECK_PARTIALMAP(Idx, ValStartIdx, ValLength, RB) \ in AArch64RegisterBankInfo() argument
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/
DAArch64RegisterBankInfo.cpp100 #define CHECK_PARTIALMAP(Idx, ValStartIdx, ValLength, RB) \ in AArch64RegisterBankInfo() argument
514 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); in hasFPConstraints() local
DAArch64InstructionSelector.cpp514 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, in getRegClassForTypeOnBank()
550 getMinClassForRegBank(const RegisterBank &RB, unsigned SizeInBits, in getMinClassForRegBank()
614 static unsigned getMinSizeForRegBank(const RegisterBank &RB) { in getMinSizeForRegBank()
928 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in selectDebugInstr() local
2405 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in select() local
2565 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
2874 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); in select() local
2998 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
3057 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
4014 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI); in selectMergeValues() local
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/external/pdfium/third_party/libtiff/
Dtif_color.c191 #define Code2V(c, RB, RW, CR) \ argument
/external/clang/tools/arcmt-test/
Darcmt-test.cpp144 for (const auto &RB : PPOpts.RemappedFileBuffers) in printResult() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DRegisterBankInfo.cpp93 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getRegBank() local
140 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in constrainGenericRegister() local
DCSEInfo.cpp347 auto *RB = MRI.getRegBankOrNull(Reg); in addNodeIDMachineOperand() local
/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/
DRegisterBankInfo.cpp90 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getRegBank() local
137 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in constrainGenericRegister() local
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/
DX86InstructionSelector.cpp252 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in selectDebugInstr() local
434 const RegisterBank &RB, in getLoadStoreOp()
548 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in selectLoadStoreOp() local
/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/
DCSEInfo.cpp395 if (const auto *RB = RCOrRB.dyn_cast<const RegisterBank *>()) in addNodeIDReg() local
/external/clang/lib/Frontend/
DASTUnit.cpp251 for (const auto &RB : PPOpts.RemappedFileBuffers) in ~ASTUnit() local
1216 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in ComputePreamble() local
1398 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in getMainBufferWithPrecompiledPreamble() local
2041 for (const auto &RB : PPOpts.RemappedFileBuffers) in Reparse() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.cpp87 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in isVCC() local
190 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in selectPHI() local
1311 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getArtifactRegBank() local
1433 const RegisterBank *RB = MRI->getRegBankOrNull(I.getOperand(0).getReg()); in selectG_CONSTANT() local

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