| /external/tensorflow/tensorflow/core/util/ |
| D | activation_mode.h | 33 RELU = 2, enumerator
|
| /external/executorch/kernels/test/custom_kernel_example/ |
| D | op_relu.cpp | 76 #define RELU(ctype, dtype) \ in my_relu_out() macro
|
| /external/pytorch/aten/src/ATen/cuda/ |
| D | CUDABlas.h | 87 RELU, enumerator
|
| /external/pytorch/aten/src/ATen/native/sparse/cuda/ |
| D | SparseSemiStructuredLinear.cu | 28 enum class Activation{NONE, RELU, SILU}; enumerator
|
| /external/pytorch/aten/src/ATen/native/quantized/cpu/ |
| D | QnnpackUtils.h | 383 enum class Activation : uint8_t { NONE = 0, RELU = 1 }; enumerator
|
| /external/libaom/config/x86/config/ |
| D | av1_rtcd.h | 48 enum { NONE, RELU, SOFTSIGN, SIGMOID } UENUM1BYTE(ACTIVATION); enumerator
|
| /external/libaom/config/x86_64/config/ |
| D | av1_rtcd.h | 48 enum { NONE, RELU, SOFTSIGN, SIGMOID } UENUM1BYTE(ACTIVATION); enumerator
|
| /external/libaom/config/arm/config/ |
| D | av1_rtcd.h | 48 enum { NONE, RELU, SOFTSIGN, SIGMOID } UENUM1BYTE(ACTIVATION); enumerator
|
| /external/libaom/config/arm64/config/ |
| D | av1_rtcd.h | 48 enum { NONE, RELU, SOFTSIGN, SIGMOID } UENUM1BYTE(ACTIVATION); enumerator
|
| /external/libaom/config/riscv64/config/ |
| D | av1_rtcd.h | 48 enum { NONE, RELU, SOFTSIGN, SIGMOID } UENUM1BYTE(ACTIVATION); enumerator
|
| /external/pytorch/aten/src/ATen/native/cuda/ |
| D | Blas.cpp | 162 RELU, enumerator
|
| /external/tensorflow/tensorflow/lite/delegates/gpu/common/ |
| D | operations.h | 89 RELU, enumerator
|
| /external/pytorch/torch/backends/_nnapi/ |
| D | serializer.py | 57 RELU = 19 variable in NNAPI_OperationCode
|
| /external/ComputeLibrary/arm_compute/core/ |
| D | Types.h | 1649 RELU, /**< Rectifier ( \f$ f(x) = max(0,x) \f$ ) */ enumerator
|