1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #ifndef SOC_MEDIATEK_MT8173_RTC_H
4 #define SOC_MEDIATEK_MT8173_RTC_H
5
6 #include <soc/pmic_wrap_common.h>
7 #include <soc/rtc_common.h>
8 #include <stdbool.h>
9 #include <stdint.h>
10 #include "mt6391.h"
11
12 /* RTC registers */
13 enum {
14 RTC_BBPU = 0xE000,
15 RTC_IRQ_STA = 0xE002,
16 RTC_IRQ_EN = 0xE004,
17 RTC_CII_EN = 0xE006
18 };
19
20 enum {
21 RTC_TC_SEC = 0xE00A,
22 RTC_TC_MIN = 0xE00C,
23 RTC_TC_HOU = 0xE00E,
24 RTC_TC_DOM = 0xE010,
25 RTC_TC_DOW = 0xE012,
26 RTC_TC_MTH = 0xE014,
27 RTC_TC_YEA = 0xE016
28 };
29
30 enum {
31 RTC_AL_SEC = 0xE018,
32 RTC_AL_MIN = 0xE01A,
33 RTC_AL_HOU = 0xE01C,
34 RTC_AL_DOM = 0xE01E,
35 RTC_AL_DOW = 0xE020,
36 RTC_AL_MTH = 0xE022,
37 RTC_AL_YEA = 0xE024,
38 RTC_AL_MASK = 0xE008
39 };
40
41 enum {
42 RTC_OSC32CON = 0xE026,
43 RTC_CON = 0xE03E,
44 RTC_WRTGR = 0xE03C
45 };
46
47 enum {
48 RTC_POWERKEY1 = 0xE028,
49 RTC_POWERKEY2 = 0xE02A
50 };
51
52 enum {
53 RTC_PDN1 = 0xE02C,
54 RTC_PDN2 = 0xE02E,
55 RTC_SPAR0 = 0xE030,
56 RTC_SPAR1 = 0xE032,
57 RTC_PROT = 0xE036,
58 RTC_DIFF = 0xE038,
59 RTC_CALI = 0xE03A
60 };
61
62 enum {
63 RTC_BBPU_PWREN = 1U << 0,
64 RTC_BBPU_BBPU = 1U << 2,
65 RTC_BBPU_AUTO = 1U << 3,
66 RTC_BBPU_CLRPKY = 1U << 4,
67 RTC_BBPU_RELOAD = 1U << 5,
68 RTC_BBPU_CBUSY = 1U << 6,
69
70 RTC_CBUSY_TIMEOUT_US = 8000
71 };
72
73 enum {
74 RTC_OSC32CON_AMPEN = 1U << 8,
75 RTC_OSC32CON_LNBUFEN = 1U << 11
76 };
77
78 enum {
79 RTC_CON_LPEN = 1U << 2,
80 RTC_CON_LPRST = 1U << 3,
81 RTC_CON_CDBO = 1U << 4,
82 RTC_CON_F32KOB = 1U << 5,
83 RTC_CON_GPO = 1U << 6,
84 RTC_CON_GOE = 1U << 7,
85 RTC_CON_GSR = 1U << 8,
86 RTC_CON_GSMT = 1U << 9,
87 RTC_CON_GPEN = 1U << 10,
88 RTC_CON_GPU = 1U << 11,
89 RTC_CON_GE4 = 1U << 12,
90 RTC_CON_GE8 = 1U << 13,
91 RTC_CON_GPI = 1U << 14,
92 RTC_CON_LPSTA_RAW = 1U << 15
93 };
94
95 enum {
96 RTC_CALI_BBPU_2SEC_EN = 1U << 8,
97 RTC_CALI_BBPU_2SEC_MODE_SHIFT = 9,
98 RTC_CALI_BBPU_2SEC_MODE_MSK = 3U << RTC_CALI_BBPU_2SEC_MODE_SHIFT,
99 RTC_CALI_BBPU_2SEC_STAT = 1U << 11
100 };
101
102 /* external API */
103 int rtc_init(int recover);
104 void rtc_boot(void);
105
rtc_read(u16 addr,u16 * rdata)106 static inline s32 rtc_read(u16 addr, u16 *rdata)
107 {
108 s32 ret;
109
110 ret = pwrap_read(addr, rdata);
111 if (ret < 0)
112 rtc_info("pwrap_read failed: ret=%d\n", ret);
113
114 return ret;
115 }
116
rtc_write(u16 addr,u16 wdata)117 static inline s32 rtc_write(u16 addr, u16 wdata)
118 {
119 s32 ret;
120
121 ret = pwrap_write(addr, wdata);
122 if (ret < 0)
123 rtc_info("pwrap_write failed: ret=%d\n", ret);
124
125 return ret;
126 }
127
128 #endif /* SOC_MEDIATEK_MT8173_RTC_H */
129