| /external/coreboot/src/drivers/genesyslogic/gl9763e/ |
| D | gl9763e.h | 12 #define SCR 0x8E0 macro
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| /external/crosvm/devices/src/ |
| D | serial.rs | 47 const SCR: u8 = 7; constant
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/ |
| D | core_cm0.h | 395 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_cm0plus.h | 413 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_sc000.h | 401 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_cm3.h | 423 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_sc300.h | 423 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_cm4.h | 491 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_cm7.h | 506 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/ |
| D | core_cm0.h | 395 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
|
| D | core_sc000.h | 401 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_cm0plus.h | 413 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_sc300.h | 423 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_cm3.h | 423 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_cm4.h | 491 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
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| D | core_cm7.h | 506 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
|
| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | arch.h | 511 #define SCR p15, 0, c1, c1, 0 macro
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| /external/trusty/arm-trusted-firmware/include/arch/aarch32/ |
| D | arch.h | 534 #define SCR p15, 0, c1, c1, 0 macro
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| /external/OpenCSD/decoder/tests/snapshots/tc2-ptm-rstk-t32/ |
| D | device1.ini | 149 SCR=0x00000000 key
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| /external/OpenCSD/decoder/tests/snapshots/trace_cov_a15/ |
| D | device1.ini | 149 SCR=0x00000000 key
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l476xx.h | 655 __IO uint32_t SCR; /*!< PWR power status reset register, Address offset: 0x18 */ member
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l4a6xx.h | 724 __IO uint32_t SCR; /*!< PWR power status reset register, Address offset: 0x18 */ member
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| /external/bcc/libbpf-tools/x86/ |
| D | vmlinux.h | 83842 SCR = 35, enumerator
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| D | vmlinux_518.h | 83842 SCR = 35, enumerator
|