Home
last modified time | relevance | path

Searched defs:SHU_CONF0_DMPGTIM (Results 1 – 3 of 3) sorted by relevance

/external/coreboot/src/vendorcode/mediatek/mt8192/include/
DMargaux_Register_DRAMC_AO.h1554 #define SHU_CONF0_DMPGTIM Fld(7, 0) //[6:0] macro
Ddramc_ch0_reg.h1161 #define SHU_CONF0_DMPGTIM GENMASK(5, 0) macro
/external/coreboot/src/vendorcode/mediatek/mt8195/include/
D8195_Register_DRAMC_AO.h1622 #define SHU_CONF0_DMPGTIM Fld(7, 0) //[6:0] macro