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Searched defs:SR1 (Results 1 – 18 of 18) sorted by relevance

/external/jemalloc_new/test/include/test/
DSFMT-params4253.h42 #define SR1 7 macro
DSFMT-params11213.h42 #define SR1 7 macro
DSFMT-params44497.h42 #define SR1 9 macro
DSFMT-params132049.h42 #define SR1 21 macro
DSFMT-params1279.h42 #define SR1 5 macro
DSFMT-params19937.h42 #define SR1 11 macro
DSFMT-params86243.h42 #define SR1 19 macro
DSFMT-params216091.h42 #define SR1 10 macro
DSFMT-params2281.h42 #define SR1 5 macro
DSFMT-params607.h42 #define SR1 13 macro
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/
DHexagonGenMux.cpp300 Register SR1 = Src1->isReg() ? Src1->getReg() : Register(); in genMuxInBlock() local
/external/llvm/lib/Target/Hexagon/
DHexagonGenMux.cpp267 unsigned SR1 = Src1->isReg() ? Src1->getReg() : 0; in genMuxInBlock() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonGenMux.cpp306 Register SR1 = Src1->isReg() ? Src1->getReg() : Register(); in genMuxInBlock() local
/external/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp577 unsigned *SR1, in findScratchRegister()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp616 unsigned *SR1, in findScratchRegister()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp442 Register *SR1, in findScratchRegister()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
Dstm32l476xx.h653 __IO uint32_t SR1; /*!< PWR power status register 1, Address offset: 0x10 */ member
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
Dstm32l4a6xx.h722 __IO uint32_t SR1; /*!< PWR power status register 1, Address offset: 0x10 */ member