| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/Utils/ |
| D | VNCoercion.cpp | 544 Value *ShVal = Builder.CreateShl( in getMemInstValueForLoad() local
552 Value *ShVal = in getMemInstValueForLoad() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
| D | VNCoercion.cpp | 484 T *ShVal = Helper.CreateShl( in getMemInstValueForLoadHelper() local
492 T *ShVal = Helper.CreateShl(Val, ConstantInt::get(Val->getType(), 1 * 8)); in getMemInstValueForLoadHelper() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | IntrinsicLowering.cpp | 194 Value *ShVal = ConstantInt::get(V->getType(), i); in LowerCTLZ() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
| D | IntrinsicLowering.cpp | 193 Value *ShVal = ConstantInt::get(V->getType(), i); in LowerCTLZ() local
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsLongBranch.cpp | 493 int ShVal = STI.inMicroMipsMode() ? 2 : 4; in runOnMachineFunction() local
|
| /external/llvm/lib/CodeGen/ |
| D | IntrinsicLowering.cpp | 308 Value *ShVal = ConstantInt::get(V->getType(), i); in LowerCTLZ() local
|
| /external/llvm/lib/Transforms/Scalar/ |
| D | GVN.cpp | 1107 Value *ShVal = Builder.CreateShl(Val, NumBytesSet*8); in GetMemInstValueForLoad() local
1114 Value *ShVal = Builder.CreateShl(Val, 1*8); in GetMemInstValueForLoad() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1065 uint64_t ShVal = ShAmt->getZExtValue(); in SimplifyDemandedBits() local
1126 unsigned ShVal = Op.getValueType().getSizeInBits()-1; in SimplifyDemandedBits() local
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 274 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in SelectArithImmed() local
354 unsigned ShVal = AArch64_AM::getShifterImm(ShType, Val); in SelectShiftedRegister() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 542 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in SelectArithImmed() local
720 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, LowZBits); in SelectShiftedRegisterFromAnd() local
744 unsigned ShVal = AArch64_AM::getShifterImm(ShType, Val); in SelectShiftedRegister() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 353 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in SelectArithImmed() local
474 unsigned ShVal = AArch64_AM::getShifterImm(ShType, Val); in SelectShiftedRegister() local
|
| D | AArch64InstructionSelector.cpp | 4210 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in select12BitValueWithLeftShift() local
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1188 SDValue ShVal = N.getNode()->getOperand(0); in matchAddressRecursively() local
|
| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 275 Value *ShVal = Op->getOperand(0); in OptAndOp() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCasts.cpp | 514 Value *ShVal, *ShAmt0, *ShAmt1; in narrowRotate() local
|
| D | InstCombineAndOrXor.cpp | 2042 Value *ShVal, *ShAmt0, *ShAmt1; in matchRotate() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| D | HexagonLoopIdiomRecognition.cpp | 1439 Value *ShAmt = CIV, *ShVal = Op; in convertShiftsToLeft() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonLoopIdiomRecognition.cpp | 1424 Value *ShAmt = CIV, *ShVal = Op; in convertShiftsToLeft() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2398 uint64_t ShVal = ShAmtC->getZExtValue(); in SimplifyDemandedBits() local
2501 unsigned ShVal = Op.getValueSizeInBits() - 1; in SimplifyDemandedBits() local
7635 SDValue ShVal; in expandROT() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1817 uint64_t ShVal = ShAmtC->getZExtValue(); in SimplifyDemandedBits() local
1914 unsigned ShVal = Op.getValueSizeInBits() - 1; in SimplifyDemandedBits() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1988 SDValue ShVal = N.getOperand(0); in matchAddressRecursively() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 2269 SDValue ShVal = N.getOperand(0); in matchAddressRecursively() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64InstructionSelector.cpp | 6008 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in select12BitValueWithLeftShift() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 5992 Register ShVal; in lowerRotate() local
|