| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 136 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
156 Register SrcReg = Src2.getReg(); in runOnMachineFunction() local
173 Register SrcReg = Src1.getReg(); in runOnMachineFunction() local
184 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
206 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 140 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
161 Register SrcReg = Src2.getReg(); in runOnMachineFunction() local
178 Register SrcReg = Src1.getReg(); in runOnMachineFunction() local
189 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
212 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 143 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() local
164 unsigned SrcReg = Src2.getReg(); in runOnMachineFunction() local
181 unsigned SrcReg = Src1.getReg(); in runOnMachineFunction() local
192 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() local
215 unsigned SrcReg = Src.getReg(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 215 MachineInstrBuilder emitInstStore(unsigned Opc, unsigned SrcReg, in emitInstStore()
806 bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr) { in emitStore()
907 unsigned SrcReg = 0; in selectStore() local
997 Register SrcReg = in selectFPExt() local
1076 Register SrcReg = getRegForValue(Src); in selectFPTrunc() local
1112 Register SrcReg = getRegForValue(Src); in selectFPToInt() local
1458 unsigned SrcReg = Allocation[ArgNo].Reg; in fastLowerArguments() local
1591 Register SrcReg = getRegForValue(II->getOperand(0)); in fastLowerIntrinsicCall() local
1721 unsigned SrcReg = Reg + VA.getValNo(); in selectRet() local
1785 Register SrcReg = getRegForValue(Op); in selectTrunc() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 219 MachineInstrBuilder emitInstStore(unsigned Opc, unsigned SrcReg, in emitInstStore()
813 bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr, in emitStore()
916 unsigned SrcReg = 0; in selectStore() local
1006 unsigned SrcReg = in selectFPExt() local
1085 unsigned SrcReg = getRegForValue(Src); in selectFPTrunc() local
1121 unsigned SrcReg = getRegForValue(Src); in selectFPToInt() local
1467 unsigned SrcReg = Allocation[ArgNo].Reg; in fastLowerArguments() local
1600 unsigned SrcReg = getRegForValue(II->getOperand(0)); in fastLowerIntrinsicCall() local
1730 unsigned SrcReg = Reg + VA.getValNo(); in selectRet() local
1794 unsigned SrcReg = getRegForValue(Op); in selectTrunc() local
[all …]
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| D | RISCVSExtWRemoval.cpp | 97 static bool isSignExtendedW(Register SrcReg, const MachineRegisterInfo &MRI, in isSignExtendedW()
104 auto AddRegDefToWorkList = [&](Register SrcReg) { in isSignExtendedW()
341 Register SrcReg = MI->getOperand(1).getReg(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/GISel/ |
| D | PPCRegisterBankInfo.cpp | 102 Register SrcReg = MI.getOperand(1).getReg(); in getInstrMapping() local
123 Register SrcReg = MI.getOperand(1).getReg(); in getInstrMapping() local
133 Register SrcReg = MI.getOperand(0).getReg(); in getInstrMapping() local
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| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 239 void addSource(unsigned SrcReg, unsigned SrcSubReg) { in addSource()
243 void setSource(int Idx, unsigned SrcReg, unsigned SrcSubReg) { in setSource()
414 unsigned SrcReg, DstReg, SubIdx; in INITIALIZE_PASS_DEPENDENCY() local
565 unsigned SrcReg, SrcReg2; in optimizeCmpInstr() local
778 virtual bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
900 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
982 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
1030 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
1102 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource()
1200 unsigned SrcReg, SrcSubReg, TrackReg, TrackSubReg; in optimizeCoalescableCopy() local
[all …]
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 169 MachineInstrBuilder emitInstStore(unsigned Opc, unsigned SrcReg, in emitInstStore()
778 bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr, in emitStore()
881 unsigned SrcReg = 0; in selectStore() local
958 unsigned SrcReg = in selectFPExt() local
1032 unsigned SrcReg = getRegForValue(Src); in selectFPTrunc() local
1068 unsigned SrcReg = getRegForValue(Src); in selectFPToInt() local
1353 unsigned SrcReg = getRegForValue(II->getOperand(0)); in fastLowerIntrinsicCall() local
1481 unsigned SrcReg = Reg + VA.getValNo(); in selectRet() local
1539 unsigned SrcReg = getRegForValue(Op); in selectTrunc() local
1554 unsigned SrcReg = getRegForValue(Src); in selectIntExt() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 34 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg()
47 Register SrcReg = MI->getOperand(1).getReg(); in expandMEMCPY() local
126 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
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| D | BPFMISimplifyPatchable.cpp | 146 MachineBasicBlock &MBB, MachineInstr &MI, Register &SrcReg, in processCandidate()
179 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg()
255 Register SrcReg = MI.getOperand(1).getReg(); in removeLD() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 34 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg()
47 Register SrcReg = MI->getOperand(1).getReg(); in expandMEMCPY() local
126 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
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| D | BPFMISimplifyPatchable.cpp | 169 MachineBasicBlock &MBB, MachineInstr &MI, Register &SrcReg, in processCandidate()
204 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg()
285 Register SrcReg = MI.getOperand(1).getReg(); in removeLD() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 146 Register SrcReg = MI.getOperand(2).getReg(); in expandArith() local
179 Register SrcReg = MI.getOperand(2).getReg(); in expandLogic() local
423 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
456 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
585 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
633 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
664 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
696 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
751 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
972 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
[all …]
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| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 64 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineAnyExt() local
118 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineZExt() local
180 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineSExt() local
238 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineTrunc() local
516 static void replaceRegOrBuildCopy(Register DstReg, Register SrcReg, in replaceRegOrBuildCopy()
587 Register SrcReg = Concat.getReg(StartSrcIdx); in findValueFromConcat() local
745 Register SrcReg = Def->getOperand(Def->getNumOperands() - 1).getReg(); in findValueFromDefImpl() local
949 Register SrcReg = MI.getSourceReg(); in tryCombineUnmergeValues() local
1136 Register SrcReg = MergeI->getOperand(Idx + 1).getReg(); in tryCombineUnmergeValues() local
1163 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineExtract() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 55 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineAnyExt() local
104 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineZExt() local
148 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineSExt() local
175 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineTrunc() local
437 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineExtract() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| D | AArch64MIPeepholeOpt.cpp | 183 Register NewDstReg) { in visitAND()
247 Register SrcReg = MI.getOperand(2).getReg(); in visitORR() local
349 Register NewDstReg) { in visitADDSUB()
390 Register NewDstReg) { in visitADDSSUBS()
493 Register SrcReg = MI.getOperand(1).getReg(); in splitTwoPartImm() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/ |
| D | GISelKnownBits.cpp | 225 Register SrcReg = Src.getReg(); in computeKnownBitsImpl() local
453 Register SrcReg = MI.getOperand(1).getReg(); in computeKnownBitsImpl() local
499 Register SrcReg = MI.getOperand(NumOps - 1).getReg(); in computeKnownBitsImpl() local
516 Register SrcReg = MI.getOperand(1).getReg(); in computeKnownBitsImpl() local
522 Register SrcReg = MI.getOperand(1).getReg(); in computeKnownBitsImpl() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 150 unsigned SrcReg, unsigned Flag = 0, in copyRegToRegClass()
618 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore()
735 unsigned SrcReg = 0; in SelectStore() local
963 Register SrcReg = getRegForValue(Src); in SelectFPExt() local
981 Register SrcReg = getRegForValue(Src); in SelectFPTrunc() local
1017 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg()
1082 Register SrcReg = getRegForValue(Src); in SelectIToFP() local
1153 unsigned SrcReg, bool IsSigned) { in PPCMoveToIntReg()
1209 Register SrcReg = getRegForValue(Src); in SelectFPToI() local
1728 unsigned SrcReg = in SelectRet() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 155 unsigned SrcReg, unsigned Flag = 0, in copyRegToRegClass()
624 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore()
741 unsigned SrcReg = 0; in SelectStore() local
966 unsigned SrcReg = getRegForValue(Src); in SelectFPExt() local
984 unsigned SrcReg = getRegForValue(Src); in SelectFPTrunc() local
1019 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg()
1084 unsigned SrcReg = getRegForValue(Src); in SelectIToFP() local
1155 unsigned SrcReg, bool IsSigned) { in PPCMoveToIntReg()
1211 unsigned SrcReg = getRegForValue(Src); in SelectFPToI() local
1725 unsigned SrcReg = in SelectRet() local
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 620 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore()
734 unsigned SrcReg = 0; in SelectStore() local
916 unsigned SrcReg = getRegForValue(Src); in SelectFPExt() local
934 unsigned SrcReg = getRegForValue(Src); in SelectFPTrunc() local
954 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg()
1019 unsigned SrcReg = getRegForValue(Src); in SelectIToFP() local
1074 unsigned SrcReg, bool IsSigned) { in PPCMoveToIntReg()
1129 unsigned SrcReg = getRegForValue(Src); in SelectFPToI() local
1635 unsigned SrcReg = in SelectRet() local
1655 unsigned SrcReg = Reg + VA.getValNo(); in SelectRet() local
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb1InstrInfo.cpp | 43 unsigned SrcReg, bool KillSrc) const { in copyPhysReg()
72 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 37 unsigned SrcReg, bool KillSrc) const { in copyPhysReg()
47 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 273 Register SrcReg = I.getOperand(1).getReg(); in selectCopy() local
731 const TargetRegisterClass *DstRC, const unsigned SrcReg, in selectTurnIntoCOPY()
752 const Register SrcReg = I.getOperand(1).getReg(); in selectTruncOrPtrToInt() local
816 const Register SrcReg = I.getOperand(1).getReg(); in selectZext() local
881 const Register SrcReg = I.getOperand(1).getReg(); in selectAnyext() local
1138 const Register SrcReg = I.getOperand(1).getReg(); in selectExtract() local
1188 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg, in emitExtractSubreg()
1226 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg, in emitInsertSubreg()
1270 const Register SrcReg = I.getOperand(1).getReg(); in selectInsert() local
1329 Register SrcReg = I.getOperand(NumDefs).getReg(); in selectUnmergeValues() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| D | Thumb1InstrInfo.cpp | 42 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg()
80 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot()
|